Re: [PATCH v2] x86/hyperv: Reserve 3 interrupt vectors used exclusively by mshv

[Wei Liu]

On Fri, Feb 20, 2026 at 10:56:07AM -0800, Mukesh R wrote:
> On 2/20/26 10:45, Wei Liu wrote:
> > On Fri, Feb 20, 2026 at 05:14:26PM +0000, Michael Kelley wrote:
> > > From: Mukesh R <mrathor@xxxxxxxxxxxxxxxxxxx> Sent: Tuesday, February 17, 2026 3:12 PM
> > > > 
> > > > MSVC compiler, used to compile the Microsoft Hyper-V hypervisor currently,
> > > > has an assert intrinsic that uses interrupt vector 0x29 to create an
> > > > exception. This will cause hypervisor to then crash and collect core. As
> > > > such, if this interrupt number is assigned to a device by Linux and the
> > > > device generates it, hypervisor will crash. There are two other such
> > > > vectors hard coded in the hypervisor, 0x2C and 0x2D for debug purposes.
> > > > Fortunately, the three vectors are part of the kernel driver space and
> > > > that makes it feasible to reserve them early so they are not assigned
> > > > later.
> > > > 
> > > > Signed-off-by: Mukesh Rathor <mrathor@xxxxxxxxxxxxxxxxxxx>
> > > > ---
> > > > 
> > > > v1: Add ifndef CONFIG_X86_FRED (thanks hpa)
> > > > v2: replace ifndef with cpu_feature_enabled() (thanks hpa and tglx)
> > > > 
> > > >   arch/x86/kernel/cpu/mshyperv.c | 27 +++++++++++++++++++++++++++
> > > >   1 file changed, 27 insertions(+)
> > > > 
> > > > diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
> > > > index 579fb2c64cfd..88ca127dc6d4 100644
> > > > --- a/arch/x86/kernel/cpu/mshyperv.c
> > > > +++ b/arch/x86/kernel/cpu/mshyperv.c
> > > > @@ -478,6 +478,28 @@ int hv_get_hypervisor_version(union hv_hypervisor_version_info *info)
> > > >   }
> > > >   EXPORT_SYMBOL_GPL(hv_get_hypervisor_version);
> > > > 
> > > > +/*
> > > > + * Reserve vectors hard coded in the hypervisor. If used outside, the hypervisor
> > > > + * will either crash or hang or attempt to break into debugger.
> > > > + */
> > > > +static void hv_reserve_irq_vectors(void)
> > > > +{
> > > > +	#define HYPERV_DBG_FASTFAIL_VECTOR	0x29
> > > > +	#define HYPERV_DBG_ASSERT_VECTOR	0x2C
> > > > +	#define HYPERV_DBG_SERVICE_VECTOR	0x2D
> > > > +
> > > > +	if (cpu_feature_enabled(X86_FEATURE_FRED))
> > > > +		return;
> > > > +
> > > > +	if (test_and_set_bit(HYPERV_DBG_ASSERT_VECTOR, system_vectors) ||
> > > > +	    test_and_set_bit(HYPERV_DBG_SERVICE_VECTOR, system_vectors) ||
> > > > +	    test_and_set_bit(HYPERV_DBG_FASTFAIL_VECTOR, system_vectors))
> > > > +		BUG();
> > > > +
> > > > +	pr_info("Hyper-V:reserve vectors: %d %d %d\n", HYPERV_DBG_ASSERT_VECTOR,
> > > > +		HYPERV_DBG_SERVICE_VECTOR, HYPERV_DBG_FASTFAIL_VECTOR);
> > > 
> > > I'm a little late to the party here, but I've always seen Intel interrupt vectors
> > > displayed as 2-digit hex numbers. This info message is displaying decimal,
> > > which is atypical and will probably be confusing.
> > 
> > Noted. The pull request to Linus has been sent. We will change the
> > format in a follow up patch.
> 
> Well, there is no 0x prefix, so should not be confusing, but no big
> deal, whatever.....
> 

When I change these I will add the 0x prefix as well.

Wei

> Thanks,
> -Mukesh
> 
> 
>