Re: [PATCH] dmaengine: tegra: Fix burst size calculation

[Frank Li]

On Tue, Feb 24, 2026 at 02:04:54PM +0530, Kartik Rajput wrote:
> Currently, the Tegra GPC DMA hardware requires the transfer length to
> be a multiple of the max burst size configured for the channel. When a
> client requests a transfer where the length is not evenly divisible by
> the configured max burst size, the DMA hangs with partial burst at
> the end.
>
> Fix this by reducing the burst size to the largest power-of-2 value
> that evenly divides the transfer length. For example, a 40-byte
> transfer with a 16-byte max burst will now use an 8-byte burst
> (40 / 8 = 5 complete bursts) instead of causing a hang.
>
> This issue was observed with the PL011 UART driver where TX DMA
> transfers of arbitrary lengths were stuck.

Suppose set burst size by UART driver through dma_config_slave. it depend
on uart's watermark settings.

Optimaized method as your example is set first transfer burst length 32,
the second transfer is 8.

Frank
>
> Fixes: ee17028009d4 ("dmaengine: tegra: Add tegra gpcdma driver")
> Cc: stable@xxxxxxxxxxxxxxx
> Signed-off-by: Kartik Rajput <kkartik@xxxxxxxxxx>
> ---
>  drivers/dma/tegra186-gpc-dma.c | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/drivers/dma/tegra186-gpc-dma.c b/drivers/dma/tegra186-gpc-dma.c
> index 4d6fe0efa76e..7df0a745e7b8 100644
> --- a/drivers/dma/tegra186-gpc-dma.c
> +++ b/drivers/dma/tegra186-gpc-dma.c
> @@ -825,6 +825,13 @@ static unsigned int get_burst_size(struct tegra_dma_channel *tdc,
>  	 * len to calculate the optimum burst size
>  	 */
>  	burst_byte = burst_size ? burst_size * slave_bw : len;
> +
> +	/*
> +	 * Find the largest burst size that evenly divides the transfer length.
> +	 * The hardware requires the transfer length to be a multiple of the
> +	 * burst size - partial bursts are not supported.
> +	 */
> +	burst_byte = min(burst_byte, 1U << __ffs(len));
>  	burst_mmio_width = burst_byte / 4;
>
>  	if (burst_mmio_width < TEGRA_GPCDMA_MMIOSEQ_BURST_MIN)
> --
> 2.43.0
>