Re: [PATCH v6 3/5] dt-bindings: net: nxp,s32-dwmac: Declare per-queue interrupts

From: Jan Petrous

Date: Wed Feb 25 2026 - 05:41:37 EST


On Wed, Feb 25, 2026 at 09:25:28AM +0000, Russell King (Oracle) wrote:
> On Wed, Feb 25, 2026 at 10:20:35AM +0100, Jan Petrous via B4 Relay wrote:
> > From: "Jan Petrous (OSS)" <jan.petrous@xxxxxxxxxxx>
> >
> > The DWMAC IP on NXP S32G/R SoCs has connected queue-based IRQ lines,
> > set them to allow using Multi-IRQ mode.
> >
> > Reviewed-by: Matthias Brugger <mbrugger@xxxxxxxx>
> > Reviewed-by: Rob Herring (Arm) <robh@xxxxxxxxxx>
> > Signed-off-by: Jan Petrous (OSS) <jan.petrous@xxxxxxxxxxx>
> > ---
> > .../devicetree/bindings/net/nxp,s32-dwmac.yaml | 44 +++++++++++++++++++---
>
> As you have added support for these IRQs into the generic code,
> shouldn't the generic dwmac binding doc reflect that this is now
> supported?
>

Hi Russell,

the generic yaml has such interrupt names already declared:
https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/net/snps%2Cdwmac.yaml#L142

Here is the current interrupt snippet:

interrupt-names:
minItems: 1
maxItems: 19
items:
oneOf:
- description: Combined signal for various interrupt events
const: macirq
- description: The interrupt to manage the remote wake-up packet detection
const: eth_wake_irq
- description: The interrupt that occurs when Rx exits the LPI state
const: eth_lpi
- description: The interrupt that occurs when HW safety error triggered
const: sfty
- description: Per channel receive completion interrupt
pattern: '^rx-queue-[0-7]$'
- description: Per channel transmit completion interrupt
pattern: '^tx-queue-[0-7]$'
- description: PPS interrupt
pattern: '^ptp-pps-[0-3]$'


BR.
/Jan