Re: [PATCH] dt-bindings: dma: snps,dw-axi-dmac: add dma-coherent property

[Vinod Koul]

On Sat, 31 Jan 2026 11:28:56 -0600, Dinh Nguyen wrote:
> The Synopsys DesignWare AXI DMA Controller on Agilex5, the controller
> operates on a cache-coherent AXI interface, where DMA transactions are
> automatically kept coherent with the CPU caches. In previous generations
> SoC (Stratix10 and Agilex) the interconnect was non-coherent, hence there
> is no need for dma-coherent property to be presence. In Agilex 5, the
> architecture has changed. It  introduced a coherent interconnect that
> supports cache-coherent DMA.
> 
> [...]

Applied, thanks!

[1/1] dt-bindings: dma: snps,dw-axi-dmac: add dma-coherent property
      commit: ff7cbcca2b32c6e079941e577c41c74036861d5a

Best regards,
-- 
~Vinod