Re: [PATCH v6 6/8] hwmon: (ina3221) Modify the 'ina3221_read_value' function
From: kernel test robot
Date: Wed Feb 25 2026 - 11:21:28 EST
Hi Wenliang,
kernel test robot noticed the following build warnings:
[auto build test WARNING on groeck-staging/hwmon-next]
[also build test WARNING on robh/for-next linus/master v7.0-rc1 next-20260224]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Wenliang-Yan/dt-bindings-hwmon-ti-ina3221-Add-SQ52210/20260225-171447
base: https://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging.git hwmon-next
patch link: https://lore.kernel.org/r/20260225090324.112145-7-wenliang202407%40163.com
patch subject: [PATCH v6 6/8] hwmon: (ina3221) Modify the 'ina3221_read_value' function
config: csky-randconfig-r051-20260225 (https://download.01.org/0day-ci/archive/20260226/202602260043.Og6ibhl8-lkp@xxxxxxxxx/config)
compiler: csky-linux-gcc (GCC) 13.4.0
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@xxxxxxxxx>
| Closes: https://lore.kernel.org/oe-kbuild-all/202602260043.Og6ibhl8-lkp@xxxxxxxxx/
cocci warnings: (new ones prefixed by >>)
>> drivers/hwmon/ina3221.c:354:2-3: Unneeded semicolon
vim +354 drivers/hwmon/ina3221.c
289
290 static int ina3221_read_value(struct ina3221_data *ina, unsigned int reg,
291 int *val)
292 {
293 unsigned int regval;
294 int ret;
295
296 ret = regmap_read(ina->regmap, reg, ®val);
297 if (ret)
298 return ret;
299
300 /*
301 * Shunt Voltage Sum register has 14-bit value with 1-bit shift
302 * Current registers have 15-bit value
303 * Power registers have 16-bit value
304 * ALERT_LIMIT registers have 16-bit value with 3-bit shift
305 * Other Shunt Voltage registers have 12 bits with 3-bit shift
306 */
307 switch (reg) {
308 case INA3221_SHUNT_SUM:
309 case INA3221_CRIT_SUM:
310 *val = sign_extend32(regval >> 1, 14);
311 break;
312 case SQ52210_CURRENT1:
313 case SQ52210_CURRENT2:
314 case SQ52210_CURRENT3:
315 *val = sign_extend32(regval, 15);
316 break;
317 case SQ52210_POWER1:
318 case SQ52210_POWER2:
319 case SQ52210_POWER3:
320 *val = regval;
321 break;
322 case INA3221_BUS1:
323 case INA3221_BUS2:
324 case INA3221_BUS3:
325 case INA3221_SHUNT1:
326 case INA3221_SHUNT2:
327 case INA3221_SHUNT3:
328 case INA3221_WARN1:
329 case INA3221_WARN2:
330 case INA3221_WARN3:
331 case INA3221_CRIT1:
332 case INA3221_CRIT2:
333 case INA3221_CRIT3:
334 *val = sign_extend32(regval >> 3, 12);
335 break;
336 case SQ52210_ALERT_LIMIT1:
337 case SQ52210_ALERT_LIMIT2:
338 case SQ52210_ALERT_LIMIT3:
339 /*
340 * This register is a 16-bit register with the lower 3 bits fixed at 0.
341 * When used to store bus and shunt alert values, shifting is required.
342 * However, for POL (Power Over Limit), it functions as a 16-bit unsigned
343 * register where the lower 3 bits being fixed at 0 will result in some
344 * loss of precision.
345 */
346 if (ina->alert_type_select & SQ52210_ALERT_ALL_POL_MASK)
347 *val = regval;
348 else
349 *val = sign_extend32(regval >> 3, 12);
350 break;
351 default:
352 *val = 0;
353 return -EOPNOTSUPP;
> 354 };
355 return 0;
356 }
357
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