Re: [PATCH v4 2/2] arm64: dts: qcom: add initial support for qcom sa8255p-ride
From: Dmitry Baryshkov
Date: Thu Feb 26 2026 - 02:18:04 EST
On Wed, Feb 25, 2026 at 08:51:07PM -0800, Deepti Jaggi wrote:
> From: Nikunj Kela <quic_nkela@xxxxxxxxxxx>
>
> Introduce initial device tree support for sa8255p Qualcomm's automotive
> infotainment SoC and its the reference board: sa8255p-ride. The dt files
> describe the basics of the SoC - CPUs, CPU map, ipcc, QUP, geni UART,
> interrupt controller, TLMM, reserved memory, SMMU, firmware scm, scmi,
> watchdog, SRAM, PSCI, ufs, pcie, pmu nodes and enable booting to shell
> with ramdisk.
>
> The Qualcomm automotive sa8255p SoC utilizes firmware to configure
> platform resources such as clocks, interconnects, and TLMM. Device drivers
> request these resources through the SCMI power,reset and performance
> protocols. Assign each device driver a dedicated SCMI channel and Tx/Rx
> doorbells to support parallel resource requests and aggregation in the
> SCMI platform server. Operate the SCMI server stack in an SMP-enabled VM,
> using the Qualcomm SMC/HVC transport driver for communication.
>
> Group resource operations to improve abstraction and reduce the number of
> SCMI requests. Follow the SCMI-based resource management approach
> demonstrated by Qualcomm at LinaroConnect 2024.[1]
>
> Limit initial support to basic platform resources, serial console, ufs
> and pcie.
> Defer enabling USB, and Ethernet to subsequent updates.
>
> [1]: https://resources.linaro.org/en/resource/wfnfEwBhRjLV1PEAJoDDte
>
> Co-developed-by: Shazad Hussain <quic_shazhuss@xxxxxxxxxxx>
> Signed-off-by: Shazad Hussain <quic_shazhuss@xxxxxxxxxxx>
> Signed-off-by: Nikunj Kela <quic_nkela@xxxxxxxxxxx>
> Signed-off-by: Deepti Jaggi <deepti.jaggi@xxxxxxxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/Makefile | 1 +
> arch/arm64/boot/dts/qcom/sa8255p-pmics.dtsi | 80 +
> arch/arm64/boot/dts/qcom/sa8255p-ride.dts | 161 +
> arch/arm64/boot/dts/qcom/sa8255p.dtsi | 4861 +++++++++++++++++++++++++++
SoC DTSI should go to a separate commit.
> 4 files changed, 5103 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index f80b5d9cf1e8..facfe99c2d97 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -172,6 +172,7 @@ qrb5165-rb5-vision-mezzanine-dtbs := qrb5165-rb5.dtb qrb5165-rb5-vision-mezzanin
> dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5-vision-mezzanine.dtb
> dtb-$(CONFIG_ARCH_QCOM) += qru1000-idp.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sa8155p-adp.dtb
> +dtb-$(CONFIG_ARCH_QCOM) += sa8255p-ride.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sa8295p-adp.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sa8540p-ride.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sa8775p-ride.dtb
> diff --git a/arch/arm64/boot/dts/qcom/sa8255p-pmics.dtsi b/arch/arm64/boot/dts/qcom/sa8255p-pmics.dtsi
> new file mode 100644
> index 000000000000..394f75bb376d
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sa8255p-pmics.dtsi
> @@ -0,0 +1,80 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> + */
> +
> +/ {
> + thermal-zones {
> + pmm8654au_0_thermal: pm8255-0-thermal {
This file defines only thermal zones. Why are they defined here rather
than in the board file?
> + polling-delay-passive = <100>;
> +
[..]
> +
> + arch_timer: timer {
Unused label, please drop.
> + compatible = "arm,armv8-timer";
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
> + };
> +};
>
> --
> 2.43.0
>
--
With best wishes
Dmitry