Re: [PATCH 3/3] drm/bridge: ti-sn65dsi83: add test pattern generation support
From: Marek Vasut
Date: Fri Feb 27 2026 - 05:41:45 EST
On 2/26/26 5:16 PM, Luca Ceresoli wrote:
Generation of a test pattern output is a useful tool for panel bringup andCan this be enabled/disabled at runtime via sysfs attribute instead ?
debugging, and very simple to support with this chip.
The value of REG_VID_CHA_ACTIVE_LINE_LENGTH_LOW needs to be divided by two
for the test pattern to work in dual LVDS mode. While not clearly stated in
the datasheet, this is needed according to the DSI Tuner [0] output. And
some dual-LVDS panels refuse to show any picture without this division by
two.
[0] https://www.ti.com/tool/DSI-TUNER
Signed-off-by: Luca Ceresoli <luca.ceresoli@xxxxxxxxxxx>
---
drivers/gpu/drm/bridge/ti-sn65dsi83.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
index 17a885244e1e..ddc8b5e1dd15 100644
--- a/drivers/gpu/drm/bridge/ti-sn65dsi83.c
+++ b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
@@ -114,6 +114,7 @@
#define REG_VID_CHA_HORIZONTAL_FRONT_PORCH 0x38
#define REG_VID_CHA_VERTICAL_FRONT_PORCH 0x3a
#define REG_VID_CHA_TEST_PATTERN 0x3c
+#define REG_VID_CHA_TEST_PATTERN_EN BIT(4)
/* IRQ registers */
#define REG_IRQ_GLOBAL 0xe0
#define REG_IRQ_GLOBAL_IRQ_EN BIT(0)
@@ -134,6 +135,9 @@
#define REG_IRQ_STAT_CHA_SOT_BIT_ERR BIT(2)
#define REG_IRQ_STAT_CHA_PLL_UNLOCK BIT(0)
+static bool sn65dsi83_test_pattern;
+module_param_named(test_pattern, sn65dsi83_test_pattern, bool, 0644);