Re: [PATCH v6 2/9] PCI: tegra194: Calibrate P2U for endpoint mode

[Vidya Sagar]

On 24/02/26 00:15, Manikanta Maddireddy wrote:
> From: Vidya Sagar <vidyas@xxxxxxxxxx>
> 
> Calibrate P2U for endpoint controller to request UPHY PLL rate change to
> Gen1 during initialization. This helps to reset stale PLL state from the
> previous bad link state.
> 
> Signed-off-by: Vidya Sagar <vidyas@xxxxxxxxxx>
> Signed-off-by: Manikanta Maddireddy <mmaddireddy@xxxxxxxxxx>
> ---
> Changes V1 -> V6: None
> 
>  drivers/pci/controller/dwc/pcie-tegra194.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> index f026af7c2ce0..51bad99cec31 100644
> --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> @@ -1058,6 +1058,9 @@ static int tegra_pcie_enable_phy(struct tegra_pcie_dw *pcie)
>  		ret = phy_power_on(pcie->phys[i]);
>  		if (ret < 0)
>  			goto phy_exit;
> +
> +		if (pcie->of_data->mode == DW_PCIE_EP_TYPE)
> +			phy_calibrate(pcie->phys[i]);
>  	}
>  
>  	return 0;

Reviewed-by: Vidya Sagar <vidyas@xxxxxxxxxx>