Re: [PATCH v7 1/2] phy: sort Kconfig and Makefile

From: Vinod Koul

Date: Fri Feb 27 2026 - 08:56:05 EST


On 25-02-26, 17:54, Théo Lebrun wrote:
> Neither Kconfig nor Makefile are sorted; reorder them.
>
> $ diff -U100 <(grep ^config drivers/phy/Kconfig) \
> <(grep ^config drivers/phy/Kconfig | sort)
>
> $ diff -U100 <(grep ^obj-\\$ drivers/phy/Makefile) \
> <(grep ^obj-\\$ drivers/phy/Makefile | sort)
>
> PHY_COMMON_PROPS{,_TEST} are kept at the top which does not respect
> sorting order.
>
> Reviewed-by: Luca Ceresoli <luca.ceresoli@xxxxxxxxxxx>
> Signed-off-by: Théo Lebrun <theo.lebrun@xxxxxxxxxxx>
> ---
> drivers/phy/Kconfig | 86 ++++++++++++++++++++++++++--------------------------
> drivers/phy/Makefile | 8 ++---
> 2 files changed, 47 insertions(+), 47 deletions(-)
>
> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> index 02467dfd4fb0..c86e90027443 100644
> --- a/drivers/phy/Kconfig
> +++ b/drivers/phy/Kconfig
> @@ -47,6 +47,26 @@ config GENERIC_PHY_MIPI_DPHY
> Provides a number of helpers a core functions for MIPI D-PHY
> drivers to us.
>
> +config PHY_AIROHA_PCIE
> + tristate "Airoha PCIe-PHY Driver"
> + depends on ARCH_AIROHA || COMPILE_TEST
> + depends on OF
> + select GENERIC_PHY
> + help
> + Say Y here to add support for Airoha PCIe PHY driver.
> + This driver create the basic PHY instance and provides initialize
> + callback for PCIe GEN3 port.
> +
> +config PHY_CAN_TRANSCEIVER
> + tristate "CAN transceiver PHY"
> + select GENERIC_PHY
> + select MULTIPLEXER
> + help
> + This option enables support for CAN transceivers as a PHY. This
> + driver provides function for putting the transceivers in various
> + functional modes using gpios and sets the attribute max link
> + rate, for CAN drivers.
> +
> config PHY_GOOGLE_USB
> tristate "Google Tensor SoC USB PHY driver"
> select GENERIC_PHY
> @@ -69,6 +89,17 @@ config PHY_LPC18XX_USB_OTG
> This driver is need for USB0 support on LPC18xx/43xx and takes
> care of enabling and clock setup.
>
> +config PHY_NXP_PTN3222
> + tristate "NXP PTN3222 1-port eUSB2 to USB2 redriver"
> + depends on I2C
> + depends on OF
> + select GENERIC_PHY
> + help
> + Enable this to support NXP PTN3222 1-port eUSB2 to USB2 Redriver.
> + This redriver performs translation between eUSB2 and USB2 signalling
> + schemes. It supports all three USB 2.0 data rates: Low Speed, Full
> + Speed and High Speed.
> +
> config PHY_PISTACHIO_USB
> tristate "IMG Pistachio USB2.0 PHY driver"
> depends on MIPS || COMPILE_TEST
> @@ -84,6 +115,18 @@ config PHY_SNPS_EUSB2
> Enable support for the USB high-speed SNPS eUSB2 phy on select
> SoCs. The PHY is usually paired with a Synopsys DWC3 USB controller.
>
> +config PHY_SPACEMIT_K1_PCIE
> + tristate "PCIe and combo PHY driver for the SpacemiT K1 SoC"
> + depends on ARCH_SPACEMIT || COMPILE_TEST
> + depends on COMMON_CLK
> + depends on HAS_IOMEM
> + depends on OF
> + select GENERIC_PHY
> + default ARCH_SPACEMIT
> + help
> + Enable support for the PCIe and USB 3 combo PHY and two
> + PCIe-only PHYs used in the SpacemiT K1 SoC.

I moved this into spacemit directory and while at it notice the file is
not sorted and patched that up.20260223065743.395539-1-vkoul@xxxxxxxxxx
Sorry I missed this and earlier one

--
~Vinod