[PATCH] bitops: use correct parameter names in kernel-doc

From: Randy Dunlap

Date: Sat Feb 28 2026 - 02:18:08 EST


Fix the kernel-doc comments to use the correct parameter names to
avoid kernel-doc warnings:

Warning: include/asm-generic/bitops/lock.h:19 function parameter 'p'
not described in 'arch_test_and_set_bit_lock'
Warning: include/asm-generic/bitops/lock.h:41 function parameter 'p'
not described in 'arch_clear_bit_unlock'
Warning: include/asm-generic/bitops/lock.h:59 function parameter 'p'
not described in 'arch___clear_bit_unlock'

Signed-off-by: Randy Dunlap <rdunlap@xxxxxxxxxxxxx>
---
Cc: Yury Norov <yury.norov@xxxxxxxxx>
Cc: Rasmus Villemoes <linux@xxxxxxxxxxxxxxxxxx>
Cc: Arnd Bergmann <arnd@xxxxxxxx>
Cc: linux-arch@xxxxxxxxxxxxxxx

Note: Shouldn't this line in the MAINTAINERS file:
F: include/asm-generic/bitops
instead be
F: include/asm-generic/bitops/

include/asm-generic/bitops/lock.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)

--- linux-next-20260211.orig/include/asm-generic/bitops/lock.h
+++ linux-next-20260211/include/asm-generic/bitops/lock.h
@@ -9,7 +9,7 @@
/**
* arch_test_and_set_bit_lock - Set a bit and return its old value, for lock
* @nr: Bit to set
- * @addr: Address to count from
+ * @p: Address to count from
*
* This operation is atomic and provides acquire barrier semantics if
* the returned value is 0.
@@ -33,7 +33,7 @@ arch_test_and_set_bit_lock(unsigned int
/**
* arch_clear_bit_unlock - Clear a bit in memory, for unlock
* @nr: the bit to set
- * @addr: the address to start counting from
+ * @p: the address to start counting from
*
* This operation is atomic and provides release barrier semantics.
*/
@@ -47,7 +47,7 @@ arch_clear_bit_unlock(unsigned int nr, v
/**
* arch___clear_bit_unlock - Clear a bit in memory, for unlock
* @nr: the bit to set
- * @addr: the address to start counting from
+ * @p: the address to start counting from
*
* A weaker form of clear_bit_unlock() as used by __bit_lock_unlock(). If all
* the bits in the word are protected by this lock some archs can use weaker