Re: [PATCH v2] Docs: iio: ad7191 Correct clock configuration

[Andy Shevchenko]

On Fri, Feb 27, 2026 at 02:08:33PM -0500, Ammar Mustafa wrote:
> Correct the ad7191 documentation to match the datasheet:
> - Fix inverted CLKSEL pin logic: device uses external clock when pin is
>   inactive, and internal CMOS/crystal when high.

high --> active

Thanks, this part looks good in the below documentation update.

> - Correct CMOS-compatible clock pin from MCLK2 to MCLK1.

I haven't checked driver yet, but is it only for a single component?
Can you double check that _all_ supported by the driver have the same
in their datasheet(s)?

...

> +- When CLKSEL pin is ACTIVE: Uses internal 4.92MHz clock (no clock property
>    needed)
> -- When CLKSEL pin is tied HIGH: Requires external clock source
> +- When CLKSEL pin is INACTIVE: Requires external clock source
>    - Can be a crystal between MCLK1 and MCLK2 pins
> -  - Or a CMOS-compatible clock driving MCLK2 pin
> +  - Or a CMOS-compatible clock driving MCLK1 pin and MCLK2 left unconnected
>    - Must specify the "clocks" property in device tree when using external clock

-- 
With Best Regards,
Andy Shevchenko