Re: [PATCH] x86/mce/amd, EDAC/mce_amd: Add new SMCA bank types

From: Borislav Petkov

Date: Sat Feb 28 2026 - 10:05:51 EST


On Mon, Feb 02, 2026 at 05:21:58PM +0000, Yazen Ghannam wrote:
> Recognize new SMCA bank types and include their short names for sysfs
> and long names for decoding.
>
> Signed-off-by: Yazen Ghannam <yazen.ghannam@xxxxxxx>
> ---
> arch/x86/include/asm/mce.h | 11 +++++++++++
> arch/x86/kernel/cpu/mce/amd.c | 21 +++++++++++++++++++++
> drivers/edac/mce_amd.c | 10 ++++++++++
> 3 files changed, 42 insertions(+)
>
> diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
> index 2d98886de09a..6e1f10ca053f 100644
> --- a/arch/x86/include/asm/mce.h
> +++ b/arch/x86/include/asm/mce.h
> @@ -370,13 +370,24 @@ enum smca_bank_types {
> SMCA_NBIO, /* Northbridge IO Unit */
> SMCA_PCIE, /* PCI Express Unit */
> SMCA_PCIE_V2,
> + SMCA_MPRAS, /* MP for RAS */
> SMCA_XGMI_PCS, /* xGMI PCS Unit */
> + SMCA_SSBDCI, /* Die to Die Interconnect */
> SMCA_NBIF, /* NBIF Unit */
> SMCA_SHUB, /* System HUB Unit */
> SMCA_SATA, /* SATA Unit */
> SMCA_USB, /* USB Unit */
> + SMCA_MPDACC, /* MP for Data Acceleration */
> + SMCA_MPM, /* Microprocessor Manageability Core */
> + SMCA_MPASP, /* AMD Secure Processor */
> + SMCA_MPASP_V2,
> + SMCA_MPART, /* AMD Root of Trust Microprocessor */
> + SMCA_DACC_FE, /* Data Acceleration Front-end */
> + SMCA_DACC_BE, /* Data Acceleration Back-end */
> SMCA_USR_DP, /* Ultra Short Reach Data Plane Controller */
> SMCA_USR_CP, /* Ultra Short Reach Control Plane Controller */
> + SMCA_EDDR5CMN, /* eDDR5 CMN */
> + SMCA_PCIE_PL, /* PCIe Link */
> SMCA_GMI_PCS, /* GMI PCS Unit */
> SMCA_XGMI_PHY, /* xGMI PHY Unit */
> SMCA_WAFL_PHY, /* WAFL PHY Unit */

That ordering looks rather random. Does it matter which enum number a bank
type is? If not, let's sort them alphabetically for easier reading...

In the remaining places too.

--
Regards/Gruss,
Boris.

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