Re: [PATCH v2] ARM: dts: renesas: r9a06g032: Add support for CPU frequency scaling

From: Geert Uytterhoeven

Date: Tue Mar 03 2026 - 02:57:18 EST


Hi Hervé,

On Mon, 2 Mar 2026 at 18:23, Herve Codina <herve.codina@xxxxxxxxxxx> wrote:
> On Mon, 2 Mar 2026 18:04:36 +0100
> Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
>
> > Hi Hervé,
> >
> > On Thu, 15 Jan 2026 at 17:49, Herve Codina (Schneider Electric)
> > <herve.codina@xxxxxxxxxxx> wrote:
> > > In RZ/N1 SoCs, CPUs are allowed to work at 125, 250 or 500 MHz when the
> > > 'ref' clock frequency value is set to 500 MHz which is the default 'ref'
> > > clock frequency value.
> > >
> > > Add support for CPU frequency scaling defining those 3 frequencies in
> > > the opp-table with the assumption that the 'ref' clock is set to its
> > > default value.
> > >
> > > Signed-off-by: Herve Codina (Schneider Electric) <herve.codina@xxxxxxxxxxx>
> >
> > Thanks for your patch, which LGTM.
> >
> > > --- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi
> > > +++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
> >
> > > @@ -24,6 +57,7 @@ cpu@0 {
> > > compatible = "arm,cortex-a7";
> > > reg = <0>;
> > > clocks = <&sysctrl R9A06G032_CLK_A7MP>;
> > > + operating-points-v2 = <&cpu_opp_table>;
> > > };
> > >
> > > cpu@1 {
> >
> > Unless I am missing something, the RZ/N1 clock driver does not support
> > the A7MP clock yet, so how can cpufreq work for you?
>
> R9A06G032_CLK_A7MP is DIV_CA7

Thank you!

Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
i.e. will queue in renesas-devel for v7.1.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds