Re: [PATCH v7 3/9] PCI: tegra194: Remove IRQF_ONESHOT flag during Endpoint interrupt registration

[Manivannan Sadhasivam]

On Thu, Mar 05, 2026 at 04:33:04PM +0530, Manivannan Sadhasivam wrote:
> On Tue, Mar 03, 2026 at 12:27:52PM +0530, Manikanta Maddireddy wrote:
> > From: Vidya Sagar <vidyas@xxxxxxxxxx>
> > 
> > The Tegra PCIe Endpoint controller has a single interrupt line that is
> > shared between multiple interrupt sources:
> > 1. PCIe link state events (link up, hot reset done)
> > 2. Configuration space events (Bus Master Enable changes)
> > 3. DMA completion events
> > 
> > Currently, the interrupt is registered with IRQF_ONESHOT, which keeps the
> > interrupt line masked until the threaded handler completes. This prevents
> > the DMA driver from sharing the same interrupt line, as the DMA completion
> > interrupts would be blocked while the threaded handler processes link state
> > events.
> > 
> > Removing IRQF_ONESHOT is safe for the following reasons:
> > 
> > 1. The hard IRQ handler (tegra_pcie_ep_hard_irq) properly acknowledges and
> >    clears all interrupt status bits in hardware before returning. This
> >    prevents interrupt storms and ensures the interrupt controller can
> >    re-enable the interrupt line immediately.
> > 
> > 2. The hard IRQ handler explicitly checks for DMA interrupts
> >    (APPL_INTR_STATUS_L1_8_0_EDMA_INT_MASK) and marks them as handled,
> >    allowing the DMA driver's handler to process them separately.
> > 
> 
> Is this change actually present in the upstream driver? I can't see it, but just
> the definition of APPL_INTR_STATUS_L1_8_0_EDMA_INT_MASK.
> 

Ok, I see this change in the next patch. But this wording is wrong as it implies
that the driver currently handles it.

> > 3. The threaded handler (tegra_pcie_ep_irq_thread) only processes link-up
> >    notifications and LTR message sending. These operations don't conflict
> >    with DMA interrupt processing and don't require the interrupt line to
> >    remain masked.
> > 
> > This change enables the DMA driver to share the interrupt line with the
> > PCIe Endpoint driver, allowing both drivers to process their respective
> > events without blocking each other.
> > 
> 
> I don't know how the DMA driver can share the interrupt requested by the
> endpoint controller driver.
> 

Same here.

- Mani

> - Mani
> 
> > Reviewed-by: Jon Hunter <jonathanh@xxxxxxxxxx>
> > Tested-by: Jon Hunter <jonathanh@xxxxxxxxxx>
> > Signed-off-by: Vidya Sagar <vidyas@xxxxxxxxxx>
> > Signed-off-by: Manikanta Maddireddy <mmaddireddy@xxxxxxxxxx>
> > ---
> > Changes V6 -> V7: None
> > Changes V1 -> V6: Updated commit message
> > 
> >  drivers/pci/controller/dwc/pcie-tegra194.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> > index 980988b7499c..352412680b4d 100644
> > --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> > +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> > @@ -2227,7 +2227,7 @@ static int tegra_pcie_dw_probe(struct platform_device *pdev)
> >  		ret = devm_request_threaded_irq(dev, pp->irq,
> >  						tegra_pcie_ep_hard_irq,
> >  						tegra_pcie_ep_irq_thread,
> > -						IRQF_SHARED | IRQF_ONESHOT,
> > +						IRQF_SHARED,
> >  						"tegra-pcie-ep-intr", pcie);
> >  		if (ret) {
> >  			dev_err(dev, "Failed to request IRQ %d: %d\n", pp->irq,
> > -- 
> > 2.34.1
> > 
> 
> -- 
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