Re: [PATCH v2 11/11] arm64: dts: imx8mm-var-som-symphony: Enable PCIe

[Frank Li]

On Fri, Mar 06, 2026 at 08:58:30PM +0100, Stefano Radaelli wrote:
> From: Stefano Radaelli <stefano.r@xxxxxxxxxxxxx>
>
> Enable PCIe support on the VAR-SOM Symphony carrier board by adding the
> external reference clock, configuring the PHY and providing the required
> clock and reset properties.
>
> Signed-off-by: Stefano Radaelli <stefano.r@xxxxxxxxxxxxx>
> ---
> v1->v2:
>  -
>
>  .../dts/freescale/imx8mm-var-som-symphony.dts | 28 +++++++++++++++++++
>  1 file changed, 28 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts b/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts
> index 9a29c81b06eb..0aa288af6c5e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts
> @@ -6,6 +6,7 @@
>  /dts-v1/;
>
>  #include <dt-bindings/leds/common.h>
> +#include <dt-bindings/phy/phy-imx8-pcie.h>
>  #include "imx8mm-var-som.dtsi"
>  #include "imx8mm-var-som-wifi-bt-iw61x.dtsi"
>
> @@ -17,6 +18,12 @@ chosen {
>  		stdout-path = &uart4;
>  	};
>
> +	pcie0_refclk: pcie0-refclk {
> +		compatible = "fixed-clock";
> +		#clock-cells = <0>;
> +		clock-frequency = <100000000>;
> +	};
> +
>  	reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
>  		compatible = "regulator-fixed";
>  		pinctrl-names = "default";
> @@ -205,6 +212,27 @@ &i2c4 {
>  	status = "okay";
>  };
>
> +&pcie_phy {
> +	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
> +	fsl,tx-deemph-gen1 = <0x2d>;
> +	fsl,tx-deemph-gen2 = <0xf>;
> +	fsl,clkreq-unsupported;
> +	clocks = <&pcie0_refclk>;
> +	status = "okay";
> +};
> +
> +&pcie0 {
> +	reset-gpio = <&pca6408 1 GPIO_ACTIVE_LOW>;
> +	clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>,
> +		 <&clk IMX8MM_CLK_PCIE1_AUX>;

put clocks-names here also. Although it duplicate dts part, it may cause
miss match between clocks and clock-names.

This type pair property should put together every where.

Frank

> +	assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
> +			  <&clk IMX8MM_CLK_PCIE1_CTRL>;
> +	assigned-clock-rates = <10000000>, <250000000>;
> +	assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
> +				 <&clk IMX8MM_SYS_PLL2_250M>;
> +	status = "okay";
> +};
> +
>  /* Header */
>  &uart1 {
>  	pinctrl-names = "default";
> --
> 2.47.3
>