Re: [PATCH v2 1/2] x86/cpu: Disable CR pinning during CPU bringup
From: Borislav Petkov
Date: Mon Mar 09 2026 - 12:21:00 EST
On Mon, Mar 09, 2026 at 08:38:10AM -0700, Dave Hansen wrote:
> On 3/9/26 06:46, Borislav Petkov wrote:
> > My SNP guest stops booting with this right:
>
> Could you dump out CR4 at wakeup_cpu_via_vmgexit() before and after this
> patch? Right here:
>
> /* CR4 should maintain the MCE value */
> cr4 = native_read_cr4() & X86_CR4_MCE;
>
> It's got to be some delta there.
Looks the same to me:
before: 31 SEV: wakeup_cpu_via_vmgexit: CR4: 0x3506f0
That's 31 CPUs - no BSP with the CR4 value above.
after: [ 3.354326] SEV: wakeup_cpu_via_vmgexit: CR4: 0x3506f0
That stops after CPU1, i.e., the first AP. But the CR4 value is the same.
> The other possibility is that some CR4 bit becomes no longer pinned when
> the CPU comes up, and the *pinning* was what caused the secondary CPU's
> CR4 bit to get set, not its actual initialization.
>
> Basically, the secondary boot code didn't explicitly set a bit and
> counted on the pinning code to do it instead.
>
> It's probably exacerbated by the "novel" way that SEV-SNP CPUs get
> brought up and all the assembly that *only* runs there.
I guess I can start commenting out things to see what happens. Hmmm...
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette