[PATCH v2 1/2] dt-bindings: mmc: snps,dwcmshc-sdhci: add HPE GSC dwcmshc compatible
From: nick . hawkins
Date: Mon Mar 09 2026 - 17:17:53 EST
From: Nick Hawkins <nick.hawkins@xxxxxxx>
Add the 'hpe,gsc-dwcmshc' compatible string for the HPE GSC (ARM64
Cortex-A53) BMC SoC eMMC controller.
The HPE GSC requires access to the MSHCCS register in the SoC system
register block to configure SCG sync disable (bit 18) for HS200 RX
delay-line phase selection. The existing 'hpe,gxp-sysreg' syscon
phandle is required for this compatible to access MSHCCS via regmap.
The HPE GSC eMMC interface only exposes a single 'core' clock (no
bus clock), so clocks/clock-names are constrained to maxItems: 1.
Add an example node with the hpe,gxp-sysreg syscon reference.
Signed-off-by: Nick Hawkins <nick.hawkins@xxxxxxx>
---
.../bindings/mmc/snps,dwcmshc-sdhci.yaml | 38 +++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
index 7e7c55dc2440..2998cc98085f 100644
--- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
+++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
@@ -23,6 +23,7 @@ properties:
- const: sophgo,sg2044-dwcmshc
- const: sophgo,sg2042-dwcmshc
- enum:
+ - hpe,gsc-dwcmshc
- rockchip,rk3568-dwcmshc
- rockchip,rk3588-dwcmshc
- snps,dwcmshc-sdhci
@@ -77,6 +78,13 @@ properties:
description: Specifies the drive impedance in Ohm.
enum: [33, 40, 50, 66, 100]
+ hpe,gxp-sysreg:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Phandle to the HPE GXP SoC system register block (syscon).
+ The driver accesses the MSHCCS register at offset 0x110 within
+ this block to configure clock synchronisation for HS200 tuning.
+
required:
- compatible
- reg
@@ -87,6 +95,25 @@ required:
allOf:
- $ref: mmc-controller.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: hpe,gsc-dwcmshc
+
+ then:
+ properties:
+ clocks:
+ maxItems: 1
+ items:
+ - description: core clock
+ clock-names:
+ maxItems: 1
+ items:
+ - const: core
+ required:
+ - hpe,gxp-sysreg
+
- if:
properties:
compatible:
@@ -190,5 +217,16 @@ examples:
#address-cells = <1>;
#size-cells = <0>;
};
+ - |
+ mmc@c0100000 {
+ compatible = "hpe,gsc-dwcmshc";
+ reg = <0xc0100000 0x1000>;
+ interrupts = <0 17 0x4>;
+ clocks = <&emmcclk>;
+ clock-names = "core";
+ hpe,gxp-sysreg = <&soc_ctrl>;
+ bus-width = <8>;
+ non-removable;
+ };
...
--
2.34.1