Re: [PATCH v2 1/2] dt-bindings: display: bridge: Add ITE IT6162 MIPI DSI to HDMI bridge

From: Krzysztof Kozlowski

Date: Tue Mar 10 2026 - 04:14:32 EST


On Mon, Mar 09, 2026 at 05:42:01PM +0800, Hermes Wu wrote:
> Add device tree binding documentation for the ITE IT6162 MIPI DSI to
> HDMI 2.0 bridge chip. The IT6162 is an I2C-controlled bridge that
> supports the following configurations:
>
> - Single MIPI DSI input: up to 4K @ 30Hz
> - Dual MIPI DSI input (combined): up to 4K @ 60Hz
>
> The chip also supports up to 8-channel audio output via 4 I2S data
> channels.

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>
> Signed-off-by: Hermes Wu <Hermes.wu@xxxxxxxxxx>
> ---
> .../bindings/display/bridge/ite,it6162.yaml | 216 +++++++++++++++++++++
> 1 file changed, 216 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it6162.yaml b/Documentation/devicetree/bindings/display/bridge/ite,it6162.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..01aa33110a20b8ad5e2946ab5e01229dcb4cb5d3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/ite,it6162.yaml
> @@ -0,0 +1,216 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/bridge/ite,it6162.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: ITE IT6162 MIPI DSI to HDMI 2.0 Bridge
> +
> +maintainers:
> + - Hermes Wu <Hermes.Wu@xxxxxxxxxx>
> +
> +description: |
> + The ITE IT6162 is a high-performance, low-power HDMI bridge that converts
> + 2 MIPI DSI signals to 1 HDMI 2.0 output. It supports dual MIPI D-PHY 2.0
> + links up to 10 Gbps each (20 Gbps total), compatible with DSI-2 v2.0.
> +
> + The HDMI transmitter supports resolutions up to 4Kx2K@60Hz and is compliant
> + with HDMI 2.0 specifications.
> +
> + For audio, it supports up to 8-channel LPCM via I2S (multi-line or TDM mode),
> + with optional S/PDIF or DSD (for SACD). Audio sampling rates up to 192 kHz
> + are supported.
> +
> +allOf:
> + - $ref: /schemas/sound/dai-common.yaml#
> +
> +properties:
> + compatible:
> + const: ite,it6162
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + reset-gpios:
> + maxItems: 1
> +
> + ivdd-supply:
> + description: Core voltage supply
> +
> + ovdd-supply:
> + description: I/O voltage supply
> +
> + ovdd1833-supply:
> + description: Flexible I/O voltage supply (1.8V domain)
> +
> + "#sound-dai-cells":
> + const: 0
> +
> + ite,support-hdcp:
> + description: >
> + Boolean property indicating that HDCP (High-bandwidth Digital Content
> + Protection) is supported and enabled on this board/hardware instance.
> +
> + When present, the driver may initialize and enable HDCP functionality
> + (typically HDCP 1.4 or higher depending on chip/firmware). If absent,
> + HDCP support is considered disabled or not implemented/wired.

How HDCP is being disabled in this chip? This does not look like
property for this device.

> +
> + Presence enables support; the property value is ignored (use as flag:
> + `ite,support-hdcp;`).

Drop, do not explain us how the DTS works.

> + type: boolean
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> +
> + properties:
> + port@0:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> + description: Input port for MIPI DSI-0 (first DSI lane pair; optional)

schema defines what is optional or not. Don't repeat constraints in free form text.

> +
> + properties:
> + endpoint:
> + $ref: /schemas/media/video-interfaces.yaml#
> + unevaluatedProperties: false
> + properties:
> + data-lanes:
> + minItems: 1
> + maxItems: 4
> + lane-polarities:
> + $ref: /schemas/types.yaml#/definitions/uint32-array

No, what is happening with this patch? It wasn't here.

None of these are correct, don't make random changes to the binding.

> + minItems: 1
> + maxItems: 5
> + items:
> + enum: [0, 1]
> + description: >
> + Array of lane polarities starting with clock lane, followed by
> + data lanes in the order given in data-lanes.
> + 0 = normal (active high), 1 = inverted (active low).
> + If omitted, all lanes are assumed normal (0).
> + clock-noncontinuous:
> + type: boolean
> + description: >
> + If present, allows MIPI DSI non-continuous clock mode
> + (clock lane can be stopped between transmissions for power saving).
> + required:
> + - data-lanes
> +
> + port@1:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> + description: Input port for MIPI DSI-1 (second DSI lane pair; required)
> +
> + properties:
> + endpoint:
> + $ref: /schemas/media/video-interfaces.yaml#
> + unevaluatedProperties: false
> + properties:
> + data-lanes:
> + minItems: 1
> + maxItems: 4
> + lane-polarities:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + minItems: 1
> + maxItems: 5
> + items:
> + enum: [0, 1]
> + description: >
> + Array of lane polarities starting with clock lane, followed by
> + data lanes in the order given in data-lanes.
> + 0 = normal (active high), 1 = inverted (active low).
> + If omitted, all lanes are assumed normal (0).
> + clock-noncontinuous:
> + type: boolean
> + description: >
> + If present, allows MIPI DSI non-continuous clock mode
> + (clock lane can be stopped between transmissions for power saving).
> + required:
> + - data-lanes
> +
> + port@2:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Audio input port (I2S; optional)
> +
> + port@3:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: HDMI output port (optional)
> +
> + required:
> + - port@1 # Only DSI-1 port is mandatory per your request

per my request? What?

Again, Don't repeat constraints in free form text.

> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - ports
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/gpio/gpio.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> +
> + i2c {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + bridge@58 {
> + compatible = "ite,it6162";
> + reg = <0x58>;
> +
> + #sound-dai-cells = <0>;
> +
> + interrupt-parent = <&pio>;
> + interrupts = <128 IRQ_TYPE_LEVEL_LOW>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&it6162_pins>;
> +
> + reset-gpios = <&pio 127 GPIO_ACTIVE_LOW>;
> +
> + ivdd-supply = <&pp1000_hdmi_x>;
> + ovdd-supply = <&pp3300_vio28_x>;
> + ovdd1833-supply = <&pp1800_vcamio_x>;
> +
> + ite,support-hdcp; // HDCP enabled on this board
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + it6162_dsi0: endpoint {
> + data-lanes = < 1 2 3 4>;
> + remote-endpoint = <&dsi_0_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + it6162_dsi1: endpoint {
> + data-lanes = < 1 2 3 4>;
> + remote-endpoint = <&dsi_1_out>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> + it6162_audio_in: endpoint {
> + remote-endpoint = <&i2s0_out>;
> + };
> + };
> +
> + port@3 {
> + reg = <3>;
> + it6162_hdmi_out: endpoint {
> + remote-endpoint = <&hdmi_connector_in>;
> + };
> + };
> + };
> + };
> + };
> \ No newline at end of file

You have patch warnings.

Write detailed changelog explaining WHY you ignore or drop people's
review and WHY you are doing these changes.

Best regards,
Krzysztof