Re: MSIs not freed in GICv3 ITS driver

[Marc Zyngier]

On Tue, 03 Mar 2026 09:26:32 +0000,
Manivannan Sadhasivam <mani@xxxxxxxxxx> wrote:
> 
> The above issue should be applicable to other MSI controller drivers as well,
> not just DWC.

The core issue is not with the irqchips, but with the MSI subsystem.

Multi-MSI devices should always result in a strict power-of-2
allocation, because that's all the HW supports. Yet, we let drivers
request a stupid number of interrupts.

I can see two outcomes: either we force the allocation to the next 2^
value, or we return an error to the caller. The first one costs memory
(extra irq descriptors), the latter forces people to fix their crap.

I'm tempted to propose the latter.

	M.

-- 
Without deviation from the norm, progress is not possible.