RE: [PATCH v3 1/3] PCI: Allow ATS to be always on for CXL.cache capable devices

From: Tian, Kevin

Date: Tue Mar 31 2026 - 04:25:24 EST


> From: Nicolin Chen <nicolinc@xxxxxxxxxx>
> Sent: Saturday, March 7, 2026 7:41 AM
>
> Controlled by the IOMMU driver, ATS is usually enabled "on demand" when
> a
> device requests a translation service from its associated IOMMU HW running
> on the channel of a given PASID. This is working even when a device has no
> translation on its RID (i.e., the RID is IOMMU bypassed).

ATS is usually enabled "on demand" when a given PASID on the device
is attached to an I/O page table. Above sounds like there will be a software
action to enable ATS upon a device translation request.

>
> However, certain PCIe devices require non-PASID ATS on their RID even
> when
> the RID is IOMMU bypassed. Call this "always on".
>
> For instance, the CXL spec notes in "3.2.5.13 Memory Type on CXL.cache":
> "To source requests on CXL.cache, devices need to get the Host Physical
> Address (HPA) from the Host by means of an ATS request on CXL.io."
>
> In other words, the CXL.cache capability requires ATS; otherwise, it can't
> access host physical memory.
>
> Introduce a new pci_ats_always_on() helper for the IOMMU driver to scan a
> PCI device and shift ATS policies between "on demand" and "always on".
>
> Add the support for CXL.cache devices first. Pre-CXL devices will be added
> in quirks.c file.
>
> Note that pci_ats_always_on() validates against pci_ats_supported(), so we
> ensure that untrusted devices (e.g. external ports) will not be always on.
> This maintains the existing ATS security policy regarding potential side-
> channel attacks via ATS.
>
> Cc: linux-cxl@xxxxxxxxxxxxxxx
> Suggested-by: Vikram Sethi <vsethi@xxxxxxxxxx>
> Suggested-by: Jason Gunthorpe <jgg@xxxxxxxxxx>
> Signed-off-by: Nicolin Chen <nicolinc@xxxxxxxxxx>

Reviewed-by: Kevin Tian <kevin.tian@xxxxxxxxx>

with a nit:

> +/*
> + * CXL r4.0, sec 3.2.5.13 Memory Type on CXL.cache notes: to source
> requests on
> + * CXL.cache, devices need to get the Host Physical Address (HPA) from the
> Host
> + * by means of an ATS request on CXL.io.
> + *
> + * In other world, CXL.cache devices cannot access host physical memory
> without
> + * ATS.
> + */

s/world/words/