Re: [PATCH v2 5/5] arch: arm64: dts: qcom: Add support for PCIe3a

From: Qiang Yu

Date: Tue Mar 31 2026 - 06:06:15 EST


On Tue, Mar 24, 2026 at 11:21:19PM +0200, Dmitry Baryshkov wrote:
> On Mon, Mar 23, 2026 at 12:15:32AM -0700, Qiang Yu wrote:
> > Describe PCIe3a controller and PHY. Also add required system resources
> > like regulators, clocks, interrupts and registers configuration for PCIe3a.
> >
> > Signed-off-by: Qiang Yu <qiang.yu@xxxxxxxxxxxxxxxx>
> > ---
> > arch/arm64/boot/dts/qcom/glymur.dtsi | 314 ++++++++++++++++++++++++++++++++++-
> > 1 file changed, 313 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
> > index bde287f645ee94116a489c55be3b7b80db3815e9..52104607a1713323fdfe2e7de710e38c1e22d06e 100644
> > --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
> > @@ -736,7 +736,7 @@ gcc: clock-controller@100000 {
> > <0>, /* USB 2 Phy PCIE PIPEGMUX */
> > <0>, /* USB 2 Phy PIPEGMUX */
> > <0>, /* USB 2 Phy SYS PCIE PIPEGMUX */
> > - <0>, /* PCIe 3a */
> > + <&pcie3a_phy>, /* PCIe 3a */
> > <&pcie3b_phy>, /* PCIe 3b */
> > <&pcie4_phy>, /* PCIe 4 */
> > <&pcie5_phy>, /* PCIe 5 */
> > @@ -2360,6 +2360,318 @@ pcie_west_slv_noc: interconnect@1920000 {
> > #interconnect-cells = <2>;
> > };
> >
> > + pcie3a: pci@1c10000 {
>
> Incorrect placement. 1c10000 > 1bf0000.
>
> > + device_type = "pci";
> > + compatible = "qcom,glymur-pcie", "qcom,pcie-x1e80100";
> > + reg = <0x0 0x01c10000 0x0 0x3000>,
> > + <0x0 0x70000000 0x0 0xf20>,
> > + <0x0 0x70000f40 0x0 0xa8>,
> > + <0x0 0x70001000 0x0 0x4000>,
> > + <0x0 0x70100000 0x0 0x100000>,
> > + <0x0 0x01c13000 0x0 0x1000>;
>
> [...]
>
> > + };
> > +
> > + pcie3a_phy: phy@f00000 {
>
> This one too, it should be before PCIe3b PHY.

Okay, will change them.

- Qiang Yu
>
> > + compatible = "qcom,glymur-qmp-gen5x8-pcie-phy";
> > + reg = <0 0x00f00000 0 0x10000>;
> > +
>
> [...]
>
> > + };
> > +
> > pcie4: pci@1bf0000 {
> > device_type = "pci";
> > compatible = "qcom,glymur-pcie", "qcom,pcie-x1e80100";
> >
> > --
> > 2.34.1
> >
>
> --
> With best wishes
> Dmitry