RE: [PATCh v3 08/14] ASoC: rsnd: Add SSI reset support for RZ/G3E platforms
From: John Madieu
Date: Fri Apr 03 2026 - 15:24:10 EST
Hi Mark,
Thanks for the review.
> -----Original Message-----
> From: Mark Brown <broonie@xxxxxxxxxx>
> Sent: Thursday, April 2, 2026 7:58 PM
> To: John Madieu <john.madieu.xa@xxxxxxxxxxxxxx>
> Subject: Re: [PATCh v3 08/14] ASoC: rsnd: Add SSI reset support for RZ/G3E
> platforms
>
> On Thu, Apr 02, 2026 at 06:24:30PM +0200, John Madieu wrote:
> > Add SSI reset support for the Renesas RZ/G3E SoC, which differs from
> > earlier generations in several ways:
> >
> > - The SSI block always operates in BUSIF mode; RZ/G3E does not
> implement
> > the SSITDR/SSIRDR registers used by R-Car Gen2/Gen3/Gen4 for direct
> SSI
> > DMA. Consequently, all audio data must pass through BUSIF.
>
> Does the driver still support PIO mode?
Yes, it does. I'll update the commit message accordingly,
to reflect that.
Regards,
John.