Re: [PATCH v2] vfio/pci: sanitize bogus INTx interrupt pin values

[Christos Longros]

Hi Alex,

The RTL8852CE reports a valid interrupt pin (INTA = 0x01) under
normal operation. The 0xFF only appears after a VFIO bus reset
bricks the device -- at that point the entire config space reads
0xFFFFFFFF, not just the pin register.

Since the root cause is the device bricking on bus reset, I think
the right fix is a PCI quirk rather than the generic bounds check
I proposed here. I have a quirk_no_bus_reset patch ready for
10ec:c852 (RTL8852CE) -- I'll send that as a v3 instead.

Should I drop this VFIO patch entirely, or is there value in
keeping a safety net for the pin register? The PCI spec limits it
to 0x00-0x04, so anything outside that range is invalid, but I
understand if you'd rather not add checks for scenarios that
shouldn't happen with functioning hardware.

Christos