Re: Re: [PATCH] riscv: mm: Do not probe satp mode limit if known in FDT

From: Guo Ren

Date: Sat Apr 25 2026 - 02:32:35 EST


> Sorry for the trouble, it seems that some miscommunication has occurred.
> While I was able to reproduce this problem in an emulator, I do not have
> access to this hardware and had misunderstood the context and the nature
> of this platform.

I also found this issue in QEMU. It can be easily reproduced with the
following modification:

diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index a1c323e66d..8c1d92c8dd 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -100,7 +100,7 @@ static const MemMapEntry virt_memmap[] = {
[VIRT_IMSIC_S] = { 0x28000000, VIRT_IMSIC_MAX_SIZE },
[VIRT_PCIE_ECAM] = { 0x30000000, 0x10000000 },
[VIRT_PCIE_MMIO] = { 0x40000000, 0x40000000 },
- [VIRT_DRAM] = { 0x80000000, 0x0 },
+ [VIRT_DRAM] = { 0x800000000000, 0x0 },
};

Best Regards
GUO Ren