[PATCH v2 5/6] drm/msm/a8xx: Make a8xx_recover IFPC safe
From: Taniya Das
Date: Mon Apr 27 2026 - 02:45:33 EST
From: Akhil P Oommen <akhilpo@xxxxxxxxxxxxxxxx>
Similar to a6xx_recover(), check the GX power domain status before
accessing mmio in GX domain a8xx_recover().
Fixes: 288a93200892 ("drm/msm/adreno: Introduce A8x GPU Support")
Signed-off-by: Akhil P Oommen <akhilpo@xxxxxxxxxxxxxxxx>
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>
Signed-off-by: Taniya Das <taniya.das@xxxxxxxxxxxxxxxx>
---
drivers/gpu/drm/msm/adreno/a8xx_gpu.c | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a8xx_gpu.c b/drivers/gpu/drm/msm/adreno/a8xx_gpu.c
index ccfccc45133fda53168d3475ebd3d543f10268af..9b99ec5ceeb5826fbd5cd1059febf5bc5ba468b5 100644
--- a/drivers/gpu/drm/msm/adreno/a8xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a8xx_gpu.c
@@ -886,17 +886,22 @@ void a8xx_recover(struct msm_gpu *gpu)
adreno_dump_info(gpu);
- if (hang_debug)
- a8xx_dump(gpu);
-
/*
* To handle recovery specific sequences during the rpm suspend we are
* about to trigger
*/
a6xx_gpu->hung = true;
- /* Halt SQE first */
- gpu_write(gpu, REG_A8XX_CP_SQE_CNTL, 3);
+ if (adreno_gpu->funcs->gx_is_on(adreno_gpu)) {
+ /*
+ * Sometimes crashstate capture is skipped, so SQE should be
+ * halted here again
+ */
+ gpu_write(gpu, REG_A8XX_CP_SQE_CNTL, 3);
+
+ if (hang_debug)
+ a8xx_dump(gpu);
+ }
pm_runtime_dont_use_autosuspend(&gpu->pdev->dev);
--
2.34.1