Re: [PATCH v1] net: phy: dp83869: fix setting CLK_O_SEL field.

[Heiko Schocher]

Hello Paolo,

On 28.04.26 15:50, Paolo Abeni wrote:
> On 4/25/26 5:13 AM, Heiko Schocher wrote:
> > Table 7-121 in datasheet says we have to set register 0xc6
> > to value 0x10 before CLK_O_SEL can be modified. No more infos
> > about this field found in datasheet. With this fix, setting
> > of CLK_O_SEL field in IO_MUX_CFG register worked through dts
> > property "ti,clk-output-sel" on a DP83869HMRGZR.
> >
> > Signed-off-by: Heiko Schocher <hs@xxxxxxxxxxxx>
>
> Note that a required fixes tag is missing here:
>
> Fixes: 01db923e8377 ("net: phy: dp83869: Add TI dp83869 phy")

Should I resend a v2 patch with this tag added ?

Thanks!

bye,
Heiko
> /P

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