Re: [PATCH] tools/nolibc: add support for OpenRISC / or1k
From: Thomas Weißschuh
Date: Tue Apr 28 2026 - 13:38:35 EST
On 2026-04-28 18:04:47+0100, Stafford Horne wrote:
> On Tue, Apr 28, 2026 at 05:48:51PM +0200, Thomas Weißschuh wrote:
> > Add support for OpenRISC / or1k to nolibc.
> >
> > _start() uses the same wrapper construct as in arch-sh.h.
> > libgcc is necessary as OpenRISC is missing 64-bit multiplication.
>
> There are a few minor issues with this patch.
Thanks for taking a look!
> Could you give any background for this? What are you working on?
> Just getting more coverage in the test suite?
I have no specific goal. In general I'd like for nolibc to support all
architectures which are supported by Linux.
> Do you have any results for or1k, considering one of the issues I
> highlighted before I am not sure this will compile as is.
This compiled fine for me and ran the full nolibc testsuite.
More details below.
With "highlighted before", do you mean "below"?
> > Signed-off-by: Thomas Weißschuh <linux@xxxxxxxxxxxxxx>
> > ---
> > tools/include/nolibc/Makefile | 2 +-
> > tools/include/nolibc/arch-openrisc.h | 176 +++++++++++++++++++++++++
> > tools/include/nolibc/arch.h | 2 +
> > tools/testing/selftests/nolibc/Makefile.nolibc | 5 +
> > tools/testing/selftests/nolibc/run-tests.sh | 4 +-
> > 5 files changed, 187 insertions(+), 2 deletions(-)
(...)
> > +#define __nolibc_syscall0(num) \
> > +({ \
> > + register long _num __asm__ ("r11") = (num); \
> > + register long _ret __asm__ ("r11"); \
> > + \
> > + __asm__ volatile ( \
> > + "l.sys 1\n" \
> > + "l.nop\n" \
>
> We do not need l.nop for l.sys instructions. They do not have a delay-slot line
> branches.
Ack, I'll remove them.
> > + : "=r"(_ret) \
> > + : "r"(_num) \
> > + : "r3", "r4", "r5", "r6", "r7", "r8", \
> > + _NOLIBC_SYSCALL_CLOBBERLIST \
> > + ); \
> > + _ret; \
> > +})
(...)
> > +#ifndef NOLIBC_NO_RUNTIME
> > +/* startup code */
> > +void _start_wrapper(void);
> > +void __attribute__((weak,noreturn))
> > +__nolibc_entrypoint __nolibc_no_stack_protector
> > +_start_wrapper(void)
> > +{
> > + __asm__ volatile (
> > + ".global _start\n" /* The C function will have a prologue, */
> > + ".type _start, @function\n" /* corrupting "sp" */
> > + ".weak _start\n"
> > + "_start:\n"
> > +
> > + "l.or r3,sp,sp\n" /* save stack pointer to 3, as arg1 of _start_c */
>
> What is sp here? There is no sp alias in OpenRISC, should it be r1? Does this
> compile?
It compiles and works with my fairly modern GCC.
It is translated to 'r1'. If it is not idiomatic, I'll change it to r1.
>
> > + "l.jal _start_c\n" /* transfer to c runtime */
> > + "l.nop\n"
>
> The l.or can go in the delay slot.
Ack.
> Also, preferrably we use spaces between args, and a space to indicate a delay
> slot e.g.
>
> "l.jal _start_c\n"
> "l.or r3, r1, r1\n"
I'd prefer to keep this aligned with the rest of nolibc instead of
aligning it with the arch/openrisc/ code.
> > +
> > + ".size _start, .-_start\n"
> > + );
> > + __nolibc_entrypoint_epilogue();
> > +}
> > +#endif /* NOLIBC_NO_RUNTIME */
(...)
> The rest looks ok to me.
Thanks!
Thomas