Re: [PATCH v5 00/13] KVM: x86/pmu: Add support for AMD Host-Only/Guest-Only bits

[Yosry Ahmed]

On Thu, Apr 30, 2026 at 1:27 PM Yosry Ahmed <yosry@xxxxxxxxxx> wrote:
>
> v5 of Jim and myself's series adding support for AMD's Host-Only and
> Guest-Only performance counter eventsel bits in KVM's mediated PMU
> passthrough implementation.
>
> These bits allow an nSVM-enabled guest to configure performance counters
> that count only during L1 execution (Host-Only) or only during L2 execution
> (Guest-Only).
>
> KVM updates the hardware event selector ENABLE bit at nested transitions
> and EFER.SVME changes such that counters only count in the appropriate
> mode.
>
> The series grew significantly since v4, as it now includes semi-related
> nSVM fixups and selftests cleanups needed for the series. I think parts
> of this series can land independently (patches 1-6 and patches 10-12),
> but then the remaining series would depend on both.
>
> v4 -> v5:
> - Dropped moving leave_guest_mode() and enter_guest_mode() definitions,
>   since the calls to update the vPMU no longer happen within these
>   functions.
> - Add PMU helpers refactoring to facilitate SVM usage.
> - Added nested SVM fixups to count VMRUN correctly in guest mode when
>   Host-Only/Guest-Only support is enabled [Jim/Sean].
> - Update the vPMU synchronously on nested VM-Enter/VM-Exit and EFER.SVME
>   changes, such that counter enablement is reevaluated before the
>   instructions are counted, as the vPMU counts based on the vCPU state
>   at instruction retirement (e.g. using new EFER value when EFER.SVME
>   changes) [Jim/Sean].
> - Keep deferring vPMU updates using KVM_REQ_PMU in the
>   svm_leave_nested() path to avoid KVM potentially consuming stale
>   state [Sean].
> - Use a single PMU callback for reprogramming counters instead of a
>   per-counter callback [Sean].
> - Move the bitmap tracking counters into SVM code. The generic vPMU code
>   now only exposes an API to reprogram counters, and an SVM wrapper uses
>   it on nested transitions [Sean].
> - Drop the manual stack-alignment fixes in the vPMU selftest, instead
>   rework L2 stack setup in all nested selftests to reuse the allocation
>   and alignment logic used by L1, and completely drop L1-provided stacks
>   for L2 [Sean].

Forgot to mention, I also added a couple of test cases for:
- Changing HG bits on an existing counter after it's enabled.
- Event filtering.