[PATCH 09/11] media: i2c: ov5640: Add ISP Control registers

From: Kieran Bingham

Date: Fri May 01 2026 - 11:41:19 EST


Define the bits for the ISP control register to be able to use
and explain component enablement.

Signed-off-by: Kieran Bingham <kieran.bingham@xxxxxxxxxxxxxxxx>
---
drivers/media/i2c/ov5640.c | 20 +++++++++++++++++++-
1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/drivers/media/i2c/ov5640.c b/drivers/media/i2c/ov5640.c
index 34fe7f51e17b..fd369a13463e 100644
--- a/drivers/media/i2c/ov5640.c
+++ b/drivers/media/i2c/ov5640.c
@@ -110,6 +110,21 @@
#define OV5640_REG_MIPI_CTRL00 0x4800
#define OV5640_REG_DEBUG_MODE 0x4814
#define OV5640_REG_PCLK_PERIOD 0x4837
+
+#define OV5640_REG_ISP_CTRL00 0x5000
+#define OV5640_ISP_00_LENC_ENABLE BIT(7)
+#define OV5640_ISP_00_GMA_ENABLE BIT(5)
+#define OV5640_ISP_00_BPC_ENABLE BIT(2)
+#define OV5640_ISP_00_WPC_ENABLE BIT(1)
+#define OV5640_ISP_00_CIP_ENABLE BIT(0)
+
+#define OV5640_REG_ISP_CTRL01 0x5001
+#define OV5640_ISP_01_SDE_ENABLE BIT(7)
+#define OV5640_ISP_01_SCL_ENABLE BIT(5)
+#define OV5640_ISP_01_UVA_ENABLE BIT(2)
+#define OV5640_ISP_01_CMX_ENABLE BIT(1)
+#define OV5640_ISP_01_AWB_ENABLE BIT(0)
+
#define OV5640_REG_ISP_FORMAT_MUX_CTRL 0x501f
#define OV5640_REG_PRE_ISP_TEST_SET1 0x503d

@@ -601,7 +616,10 @@ static const struct reg_value ov5640_init_setting[] = {
{0x3002, 0x1c, 0, 0}, {0x3004, 0xff, 0, 0}, {0x3006, 0xc3, 0, 0},
{0x302e, 0x08, 0, 0}, {0x4300, 0x3f, 0, 0},
{0x501f, 0x00, 0, 0}, {0x440e, 0x00, 0, 0}, {0x4837, 0x0a, 0, 0},
- {0x5000, 0xa7, 0, 0}, {0x5001, 0xa3, 0, 0},
+
+ /* ISP Control */
+ {OV5640_REG_ISP_CTRL00, 0xa7, 0, 0},
+ {OV5640_REG_ISP_CTRL01, 0xa3, 0, 0},

/* AWB Control */
{OV5640_REG_AWB_CONTROL_00, 0xff, 0, 0}, /* AWB B Block */

--
2.52.0