[PATCH] dt-bindings: misc: Add binding for Xilinx AXI-Stream FIFO
From: Pramod Maurya
Date: Sat May 09 2026 - 13:17:16 EST
Add a YAML schema for the Xilinx AXI-Stream FIFO IP core (PG080).
The binding documents the three supported compatible strings and all
vendor-specific properties that the axis-fifo driver reads from the
device tree.
This resolves the following checkpatch.pl warnings in
drivers/staging/axis-fifo/axis-fifo.c:
WARNING: DT compatible string "xlnx,axi-fifo-mm-s-4.1" appears un-documented
WARNING: DT compatible string "xlnx,axi-fifo-mm-s-4.2" appears un-documented
WARNING: DT compatible string "xlnx,axi-fifo-mm-s-4.3" appears un-documented
Signed-off-by: Pramod Maurya <pramod.nexgen@xxxxxxxxx>
---
.../bindings/misc/xlnx,axi-fifo-mm-s.yaml | 92 +++++++++++++++++++
MAINTAINERS | 6 ++
2 files changed, 98 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/xlnx,axi-fifo-mm-s.yaml
diff --git a/Documentation/devicetree/bindings/misc/xlnx,axi-fifo-mm-s.yaml b/Documentation/devicetree/bindings/misc/xlnx,axi-fifo-mm-s.yaml
new file mode 100644
index 000000000000..1e07db9cd456
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/xlnx,axi-fifo-mm-s.yaml
@@ -0,0 +1,92 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/misc/xlnx,axi-fifo-mm-s.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xilinx AXI-Stream FIFO
+
+maintainers:
+ - Jacob Feder <jacobsfeder@xxxxxxxxx>
+
+description:
+ The Xilinx AXI-Stream FIFO (PG080) provides a memory-mapped interface to
+ an AXI-Stream FIFO IP core. It allows a processor to transmit and receive
+ AXI-Stream packets via simple MMIO register reads and writes.
+
+properties:
+ compatible:
+ enum:
+ - xlnx,axi-fifo-mm-s-4.1
+ - xlnx,axi-fifo-mm-s-4.2
+ - xlnx,axi-fifo-mm-s-4.3
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ xlnx,axi-str-rxd-tdata-width:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Width of the receive AXI-Stream data bus in bits. Currently only 32
+ is supported.
+ const: 32
+
+ xlnx,axi-str-txd-tdata-width:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Width of the transmit AXI-Stream data bus in bits. Currently only 32
+ is supported.
+ const: 32
+
+ xlnx,rx-fifo-depth:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Depth of the receive FIFO in words.
+
+ xlnx,tx-fifo-depth:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Depth of the transmit FIFO in words.
+
+ xlnx,use-rx-data:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Set to 1 if the receive data FIFO is enabled, 0 otherwise.
+ enum: [0, 1]
+
+ xlnx,use-tx-data:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Set to 1 if the transmit data FIFO is enabled, 0 otherwise.
+ enum: [0, 1]
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - xlnx,axi-str-rxd-tdata-width
+ - xlnx,axi-str-txd-tdata-width
+ - xlnx,rx-fifo-depth
+ - xlnx,tx-fifo-depth
+ - xlnx,use-rx-data
+ - xlnx,use-tx-data
+
+additionalProperties: false
+
+examples:
+ - |
+ axi_fifo: fifo@43c00000 {
+ compatible = "xlnx,axi-fifo-mm-s-4.3";
+ reg = <0x43c00000 0x10000>;
+ interrupts = <0 30 4>;
+ interrupt-parent = <&gic>;
+ xlnx,axi-str-rxd-tdata-width = <32>;
+ xlnx,axi-str-txd-tdata-width = <32>;
+ xlnx,rx-fifo-depth = <0x1000>;
+ xlnx,tx-fifo-depth = <0x1000>;
+ xlnx,use-rx-data = <1>;
+ xlnx,use-tx-data = <1>;
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 9b107057ad8c..84be7c8ae257 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -29130,6 +29130,12 @@ S: Maintained
F: Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml
F: drivers/net/ethernet/xilinx/xilinx_axienet*
+XILINX AXI-STREAM FIFO DRIVER
+M: Jacob Feder <jacobsfeder@xxxxxxxxx>
+S: Maintained
+F: Documentation/devicetree/bindings/misc/xlnx,axi-fifo-mm-s.yaml
+F: drivers/staging/axis-fifo/
+
XILINX CAN DRIVER
M: Appana Durga Kedareswara rao <appana.durga.rao@xxxxxxxxxx>
L: linux-can@xxxxxxxxxxxxxxx
--
2.52.0