[PATCH net-next 2/3] net/stmmac/dwxgmac: Extend MTL/DMA support to 16 queues
From: Jakub Raczynski
Date: Mon May 11 2026 - 13:30:39 EST
New datasheets for XGMAC (3.20a and 3.40a, depending on product) support up to
16 MTL/DMA queues. Before we increase max amount through macro,
prepare dwxgmac functions to handle that.
Signed-off-by: Jakub Raczynski <j.raczynski@xxxxxxxxxxx>
---
.../net/ethernet/stmicro/stmmac/dwxgmac2.h | 2 ++
.../ethernet/stmicro/stmmac/dwxgmac2_core.c | 24 +++++++++++++++++--
2 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h
index 51943705a2b0..bd333afe7e1b 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h
@@ -257,6 +257,8 @@
#define XGMAC_MTL_INT_STATUS 0x00001020
#define XGMAC_MTL_RXQ_DMA_MAP0 0x00001030
#define XGMAC_MTL_RXQ_DMA_MAP1 0x00001034
+#define XGMAC_MTL_RXQ_DMA_MAP2 0x00001038
+#define XGMAC_MTL_RXQ_DMA_MAP3 0x0000103c
#define XGMAC_QxMDMACH(x) GENMASK((x) * 8 + 7, (x) * 8)
#define XGMAC_QxMDMACH_SHIFT(x) ((x) * 8)
#define XGMAC_QDDMACH BIT(7)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
index 98b3e0cc84fa..76f8214a6e5b 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
@@ -266,9 +266,29 @@ static void dwxgmac2_map_mtl_to_dma(struct mac_device_info *hw, u32 queue,
void __iomem *ioaddr = hw->pcsr;
u32 value, reg;
- reg = (queue < 4) ? XGMAC_MTL_RXQ_DMA_MAP0 : XGMAC_MTL_RXQ_DMA_MAP1;
- if (queue >= 4)
+ switch (queue / 4) {
+ // queue 0 ~ 3
+ case 0:
+ reg = XGMAC_MTL_RXQ_DMA_MAP0;
+ break;
+ // queue 4 ~ 7
+ case 1:
+ reg = XGMAC_MTL_RXQ_DMA_MAP1;
queue -= 4;
+ break;
+ // queue 8 ~ 11
+ case 2:
+ reg = XGMAC_MTL_RXQ_DMA_MAP2;
+ queue -= 8;
+ break;
+ // queue 12 ~ 15
+ case 3:
+ reg = XGMAC_MTL_RXQ_DMA_MAP3;
+ queue -= 12;
+ break;
+ default:
+ return;
+ }
value = readl(ioaddr + reg);
value &= ~XGMAC_QxMDMACH(queue);
--
2.34.1