[PATCH v3 09/13] drm/bridge: tc358762: Fix sync polarities

From: Tomi Valkeinen

Date: Wed May 13 2026 - 09:28:53 EST


Setting LCDCTRL_HSYNC_POL and LCDCTRL_VSYNC_POL will make the respective
sync signal active high. The driver does this in inverse. Fix it.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@xxxxxxxxxxxxxxxx>
---
drivers/gpu/drm/bridge/tc358762.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/bridge/tc358762.c b/drivers/gpu/drm/bridge/tc358762.c
index 2d9491e8e582..5d6092e1d190 100644
--- a/drivers/gpu/drm/bridge/tc358762.c
+++ b/drivers/gpu/drm/bridge/tc358762.c
@@ -191,10 +191,10 @@ static int tc358762_init(struct tc358762 *ctx)

lcdctrl |= LCDCTRL_DCLK_POL;

- if (ctx->mode.flags & DRM_MODE_FLAG_NHSYNC)
+ if (ctx->mode.flags & DRM_MODE_FLAG_PHSYNC)
lcdctrl |= LCDCTRL_HSYNC_POL;

- if (ctx->mode.flags & DRM_MODE_FLAG_NVSYNC)
+ if (ctx->mode.flags & DRM_MODE_FLAG_PVSYNC)
lcdctrl |= LCDCTRL_VSYNC_POL;

tc358762_write(ctx, LCDCTRL, lcdctrl);

--
2.43.0