[PATCH 2/9] dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible

[Jia Wang via B4 Relay]

From: Jia Wang <wangjia@xxxxxxxxxxxxx>

Update Documentation for supporting UltraRISC CP100 based CPU.

CP100 is used in UltraRISC DP1000 SoC.

Signed-off-by: Jia Wang <wangjia@xxxxxxxxxxxxx>
---
 Documentation/devicetree/bindings/riscv/cpus.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
index 5feeb2203050..9f5226717701 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.yaml
+++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
@@ -67,6 +67,7 @@ properties:
               - thead,c908
               - thead,c910
               - thead,c920
+              - ultrarisc,cp100
           - const: riscv
       - items:
           - enum:

-- 
2.34.1