Re: [PATCH v2 2/2] arm64: dts: socfpga: Add dma-coherent to XGMAC nodes

[Dinh Nguyen]

On 5/15/26 03:00, muhammad.nazim.amirul.nazle.asmade@xxxxxxxxxx wrote:
> From: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@xxxxxxxxxx>
>
> The SMMU is enabled and transactions going through it are cache
> coherent. Add the dma-coherent property to the XGMAC nodes to prevent
> redundant cache flush/invalidate operations and potential stale data
> issues.
>
> Signed-off-by: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@xxxxxxxxxx>
> ---
> Changes in v2:
> - Move dma-coherent property into the base DTSI file instead of individual DTS files
>
>   arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 3 +++
>   1 file changed, 3 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> index 64f3739a0c33..bef386cb2fcc 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> @@ -577,6 +577,7 @@ gmac0: ethernet@10810000 {
>   			altr,sysmgr-syscon = <&sysmgr 0x44 0>;
>   			snps,clk-csr = <0>;
>   			iommus = <&smmu 1>;
> +			dma-coherent;
>   			status = "disabled";
>   
>   			stmmac_axi_emac0_setup: stmmac-axi-config {
> @@ -690,6 +691,7 @@ gmac1: ethernet@10820000 {
>   			altr,sysmgr-syscon = <&sysmgr 0x48 0>;
>   			snps,clk-csr = <0>;
>   			iommus = <&smmu 2>;
> +			dma-coherent;
>   			status = "disabled";
>   
>   			stmmac_axi_emac1_setup: stmmac-axi-config {
> @@ -803,6 +805,7 @@ gmac2: ethernet@10830000 {
>   			altr,sysmgr-syscon = <&sysmgr 0x4c 0>;
>   			snps,clk-csr = <0>;
>   			iommus = <&smmu 3>;
> +			dma-coherent;
>   			status = "disabled";
>   
>   			stmmac_axi_emac2_setup: stmmac-axi-config {

Same comment from patch [1/2].

Also, can you add the dma-coherent to the other IPs using the SMMU as well?

Thanks,
Dinh