Re: [PATCH 3/3] arm64: qcom: dts: qcm6490: Add JPEG encoder DT properties

[Dmitry Baryshkov]

On Fri, May 15, 2026 at 02:47:01PM +0300, Atanas Filipov wrote:
> Add the required JPEG encoder definitions to the device tree.
> 
> Signed-off-by: Atanas Filipov <atanas.filipov@xxxxxxxxxxxxxxxx>
> ---
>  arch/arm64/boot/dts/qcom/kodiak.dtsi | 52 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 52 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
> index 6079e67ea829..dbfc6cc051f3 100644
> --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
> +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
> @@ -5198,6 +5198,58 @@ port@4 {
>  			};
>  		};
>  
> +		qcom_jpeg_enc: qcom,jpegenc@ac4e000 {
> +				cell-index = <0>;
> +				compatible = "qcom,qcm6490-jenc";

Huge, huge NAK. Wrong indentation, wrong name, useless label,
undocumented cell-index, wrong format of other lines, etc.

> +
> +				reg =
> +						<0 0xac4e000 0 0x4000>,

0x0 instead of just 0.

> +						<0 0xac40000 0 0x1000>;
> +
> +				reg-names =
> +						"jpeg_regs",
> +						"cpas_regs";
> +
> +				interrupts = <GIC_SPI 474 IRQ_TYPE_EDGE_RISING>;
> +				power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>;
> +
> +				clocks =
> +						<&gcc GCC_CAMERA_HF_AXI_CLK>,
> +						<&gcc GCC_CAMERA_SF_AXI_CLK>,
> +						<&camcc CAM_CC_CORE_AHB_CLK>,
> +						<&camcc CAM_CC_CPAS_AHB_CLK>,
> +						<&camcc CAM_CC_CAMNOC_AXI_CLK>,
> +						<&camcc CAM_CC_JPEG_CLK>;
> +
> +				clock-names =
> +						"gcc_hf_axi_clk",
> +						"gcc_sf_axi_clk",
> +						"core_ahb_clk",
> +						"cpas_ahb_clk",
> +						"camnoc_axi_clk",
> +						"jpeg_clk";
> +
> +				iommus =
> +						<&apps_smmu 0x20C0 0x20>,
> +						<&apps_smmu 0x20E0 0x20>;

lowercase hex

> +
> +				interconnects =
> +						<&gem_noc MASTER_APPSS_PROC 0
> +						&cnoc2 SLAVE_CAMERA_CFG 0>,

Wrong indentation, use defined values instead of just 0.

> +						<&mmss_noc MASTER_CAMNOC_HF 0
> +						&mc_virt SLAVE_EBI1 0>,
> +						<&mmss_noc MASTER_CAMNOC_SF 0
> +						&mc_virt SLAVE_EBI1 0>,
> +						<&mmss_noc MASTER_CAMNOC_ICP 0
> +						&mc_virt SLAVE_EBI1 0>;
> +
> +				interconnect-names =
> +						"cam_ahb",
> +						"cam_hf_0_mnoc",
> +						"cam_sf_0_mnoc",
> +						"cam_sf_icp_mnoc";
> +		};
> +
>  		camcc: clock-controller@ad00000 {
>  			compatible = "qcom,sc7280-camcc";
>  			reg = <0 0x0ad00000 0 0x10000>;
> 
> -- 
> 2.34.1
> 

-- 
With best wishes
Dmitry