Re: [PATCH 1/3] media: dt-bindings: qcom: add JPEG encoder binding

[Dmitry Baryshkov]

On Fri, May 15, 2026 at 02:46:59PM +0300, Atanas Filipov wrote:
> Add YAML device tree binding for the Qualcomm JPEG encoder
> hardware. This binding is used by the newly added driver and
> describes all required resources, including clocks, power domains,
> IOMMU mappings and interconnect paths.
> 
> Signed-off-by: Atanas Filipov <atanas.filipov@xxxxxxxxxxxxxxxx>
> ---
>  .../bindings/media/qcom,jpeg-encoder.yaml          | 122 +++++++++++++++++++++
>  1 file changed, 122 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/media/qcom,jpeg-encoder.yaml b/Documentation/devicetree/bindings/media/qcom,jpeg-encoder.yaml
> new file mode 100644
> index 000000000000..fac3e654458d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/qcom,jpeg-encoder.yaml
> @@ -0,0 +1,122 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/qcom,jpeg-encoder.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm JPEG Encoder
> +
> +maintainers:
> +  - Azam Sadiq Pasha Kapatrala Syed <akapatra@xxxxxxxxxxx>
> +  - Hariram Purushothaman <hariramp@xxxxxxxxxxx>

What is the recommended email domain for Qualcomm submissions? Why are
you nominating some people as maintainers who haven't even touched this
patch?

> +
> +description: |
> +  Qualcomm JPEG Encoder is the JPEG encode hardware present in Qualcomm SoCs
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +        - qcom,sc7180-jenc
> +        - qcom,sm8250-jenc
> +        - qcom,sm7325-jenc
> +        - qcom,sc7280-jenc
> +        - qcom,qcm6490-jenc
> +        - qcom,sm8550-jenc

Is there any difference between JPEG encoder on all these platforms? If
not, add just one primary entry (qcom,sdm845-jenc would sound good) and
then use it as a fallback compatible for all other platforms.

> +
> +  reg:
> +    maxItems: 2
> +
> +  reg-names:
> +    items:
> +      - const: jpeg-regs
> +      - const: cpas-regs
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  clocks:
> +    minItems: 6
> +    maxItems: 6
> +
> +  clock-names:
> +    items:
> +    - const: gcc_hf_axi_clk
> +    - const: gcc_sf_axi_clk

These clocks name the source. Can we have a target-specific clock
name instead? Also, why do you need _clk all over the place? What else
can it be other than the clock?

> +    - const: core_ahb_clk
> +    - const: cpas_ahb_clk
> +    - const: camnoc_axi_clk
> +    - const: jpeg_clk
> +
> +  power-domains:
> +    maxItems: 1
> +
> +  iommus:
> +    maxItems: 2
> +
> +  interconnects:
> +    maxItems: 4
> +
> +  interconnect-names:
> +    items:
> +      - const: cam_ahb
> +      - const: cam_hf_0_mnoc
> +      - const: cam_sf_0_mnoc
> +      - const: cam_sf_icp_mnoc

Is this supposed to be a separate node or a child of the camss node?

> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - interrupts
> +  - power-domains
> +  - iommus
> +  - interconnects
> +  - interconnect-names
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    qcom_jpeg_enc: qcom,jpegenc@ac4e000 {

Drop the label, it's useless.

Do you see any other device tree nodes with the names starting with
qcom,? What should node names look like? Which document covers node
names?

> +        cell-index = <0>;
> +        compatible = "qcom,qcm6490-jenc";
> +        reg =
> +            <0 0xac4e000 0 0x4000>,

Do you see other examples having newline after the '=' sign?

> +            <0 0xac40000 0 0x1000>;

This points out that this wasn't even validated.

> +
> +        interrupts = <GIC_SPI 474 IRQ_TYPE_EDGE_RISING>;

And this won't build as is. 

> +        power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>;
> +
> +        clock-names =
> +            "gcc_hf_axi_clk",
> +            "gcc_sf_axi_clk",
> +            "core_ahb_clk",
> +            "cpas_ahb_clk",
> +            "camnoc_axi_clk",
> +            "jpeg_clk";
> +
> +        clocks =
> +            <&gcc GCC_CAMERA_HF_AXI_CLK>,
> +            <&gcc GCC_CAMERA_SF_AXI_CLK>,
> +            <&camcc CAM_CC_CORE_AHB_CLK>,
> +            <&camcc CAM_CC_CPAS_AHB_CLK>,
> +            <&camcc CAM_CC_CAMNOC_AXI_CLK>,
> +            <&camcc CAM_CC_JPEG_CLK>;
> +
> +        iommus =
> +            <&apps_smmu 0x20C0 0x20>,
> +            <&apps_smmu 0x20E0 0x20>;
> +
> +        interconnects =
> +            <&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_CAMERA_CFG 0>,
> +            <&mmss_noc MASTER_CAMNOC_HF 0 &mc_virt SLAVE_EBI1 0>,
> +            <&mmss_noc MASTER_CAMNOC_SF 0 &mc_virt SLAVE_EBI1 0>,
> +            <&mmss_noc MASTER_CAMNOC_ICP 0 &mc_virt SLAVE_EBI1 0>;
> +
> +        interconnect-names =
> +            "cam_ahb",
> +            "cam_hf_0_mnoc",
> +            "cam_sf_0_mnoc",
> +            "cam_sf_icp_mnoc";
> +    };
> 
> -- 
> 2.34.1
> 

-- 
With best wishes
Dmitry