Re: [RFC PATCH v3 1/4] i2c: rust: implement kernel::io::Io trait for I2cClient

[Muchamad Coirul Anwar]

On Thu, 28 May 2026 16:25:57 +0100
Jonathan Cameron <jic23@xxxxxxxxxx> wrote:

> My main concern is this currently takes away the clarity off smbus
> naming and replaces it with the impression this is how i2c reads and writes
> are done in general.  How will this support other forms of access?
>
> How do we have lots of different types of i2c supported?  Simplest being
> the ones regmap supports today. There are 7ish in drivers/base/regmap-i2c.c
>
> Or if the plan is to only support register style interfaces why not only
> allow for use of regmap?

Some context on how we got here: in v2 I added standalone SMBus methods
on I2cClient (smbus_read_byte_data, etc). Igor reviewed it [1] and
pointed out that the agreed direction is for I2cClient to implement
the generic Io trait [2] from Zhi Wang's driver-core-testing work.
That discussion happened during Igor's own i2c-adapter series. I
offered to take it on, and he confirmed bundling it in my series was
fine.

I take your point about losing the SMBus naming clarity. The underlying
calls are still `i2c_smbus_read_byte_data` and friends though, the Io
trait just provides a uniform interface on top with bounds checking via
`io_addr()`. The call sites in the driver use `try_read8`/`try_read16`
which map 1:1 to the smbus byte/word operations.

For other I2C access types (block, raw msg, etc), those would need
additional trait methods or a separate abstraction. Rust regmap bindings
don't exist yet, so this is the available path for now. Once regmap
lands in Rust, drivers that fit the regmap model can use that instead.

[1] https://lore.kernel.org/rust-for-linux/20260131-i2c-adapter-v1-4-5a436e34cd1a@xxxxxxxxx/
[2] https://git.kernel.org/pub/scm/linux/kernel/git/driver-core/driver-core.git/commit/?h=driver-core-testing&id=121d87b28e1d9061d3aaa156c43a627d3cb5e620

> One other comment inline. I'm seeing what looks to be a check for an
> 8 bit address whereas smbus is 7 bit addressing.

> Except smbus standard addressing is 7 bit.
> Need space for the read / write bit.

To clarify, `maxsize=256` here refers to the SMBus command byte
(register address)
range, not the device address. The command byte is a full 8 bits
(0x00..0xFF = 256 values). The 7-bit device address plus R/W bit is
handled at the adapter level by the I2C core when the client is
instantiated; it's not part of the register access path that Io wraps.

The `io_addr()` bounds check ensures `offset + sizeof(access) <= 256`,
i.e. the register address stays within the valid command byte range.
I'll add a comment in the code clarifying this distinction since the
naming is confusing without it.

> Unrelated change.

Dropping the trailing-period fix from this patch in v4.

Thanks,
Coirul