[PATCH v7 3/3] arm64: dts: qcom: monaco: enable the inline crypto engine for SDHC
From: Neeraj Soni
Date: Mon Jun 08 2026 - 00:19:35 EST
Add an ICE node to monaco SoC description and enable it by adding a
phandle to the SDHC node.
Reviewed-by: Kuldeep Singh <kuldeep.singh@xxxxxxxxxxxxxxxx>
Link: https://lore.kernel.org/r/20260310113557.348502-4-neeraj.soni@xxxxxxxxxxxxxxxx
Signed-off-by: Neeraj Soni <neeraj.soni@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/monaco.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
index e4c8466f941b..06ed34dfe135 100644
--- a/arch/arm64/boot/dts/qcom/monaco.dtsi
+++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
@@ -4835,6 +4835,8 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
supports-cqe;
dma-coherent;
+ qcom,ice = <&sdhc_ice>;
+
mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
@@ -4867,6 +4869,13 @@ opp-384000000 {
};
};
+ sdhc_ice: crypto@87c8000 {
+ compatible = "qcom,qcs8300-inline-crypto-engine",
+ "qcom,inline-crypto-engine";
+ reg = <0x0 0x087c8000 0x0 0x18000>;
+ clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>;
+ };
+
usb_1_hsphy: phy@8904000 {
compatible = "qcom,qcs8300-usb-hs-phy",
"qcom,usb-snps-hs-7nm-phy";
--
2.34.1