Re: [PATCH 2/2] phy: qcom: qmp-pcie: Add IPQ9650 PCIe PHY support
From: Kathiravan Thirumoorthy
Date: Tue Jun 09 2026 - 06:36:27 EST
On 6/8/2026 12:26 PM, Dmitry Baryshkov wrote:
On Tue, Jun 02, 2026 at 02:40:18PM +0530, Kathiravan Thirumoorthy wrote:
The IPQ9650 platform has three Gen3 2-lane PCIe controllers and two Gen3Now vdda-phy / vdda-pll supplies?
1-lane PCIe controllers. The PHY instances also require the on-chip refgen
supply.
Add the IPQ9650 Gen3 x1 and x2 QMP PCIe PHY configurations, including the
refgen regulator supply.
Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@xxxxxxxxxxxxxxxx>
---
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 220 +++++++++++++++++++++++++++++++
1 file changed, 220 insertions(+)
@@ -3378,6 +3524,10 @@ static const char * const qmp_phy_vreg_l[] = {
"vdda-phy", "vdda-pll",
};
+static const char * const ipq9650_qmp_phy_vreg_l[] = {
+ "refgen",
+};
Cross checked with HW team again. Along with refgen, there is a on-chip LDO which supplies fixed voltage to the PHYs. It is enabled upon system power on and no SW intervention is required.
regulator-fixed doesn't take the resource 'reg'. May be should I create another regulator driver which accepts 'reg', something similar to the qcom-refgen-regulator? Please advise.
+
static const char * const sm8550_qmp_phy_vreg_l[] = {
"vdda-phy", "vdda-pll", "vdda-qref",
};