[PATCH 5/5] arm64: dts: renesas: Add LCDC overlays for RZ/T2H and RZ/N2H EVKs with ADV7513
From: Prabhakar
Date: Tue Jun 09 2026 - 09:00:22 EST
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
Add DT overlay support enabling the DU/LCDC pipeline on the RZ/T2H
(r9a09g077) and RZ/N2H (r9a09g087) evaluation kits when fitted with a
CN15/CN20 ADV7513 HDMI transmitter.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
---
Note, as per the HW manual the slew rate setting for the LCDC pins should
be 1 (fast), but while testing on the EVKs with ADV7513, the display output
was unstable (flickers were seen) with slew rate 1. Setting the slew rate
to 0 (slow) resolved the issue.
---
arch/arm64/boot/dts/renesas/Makefile | 6 +++
.../renesas/r9a09g077m44-evk-cn15-lcdc.dtso | 40 +++++++++++++++
.../renesas/r9a09g087m44-evk-cn20-lcdc.dtso | 35 +++++++++++++
.../dts/renesas/rzt2h-n2h-evk-du-adv7513.dtsi | 50 +++++++++++++++++++
4 files changed, 131 insertions(+)
create mode 100644 arch/arm64/boot/dts/renesas/r9a09g077m44-evk-cn15-lcdc.dtso
create mode 100644 arch/arm64/boot/dts/renesas/r9a09g087m44-evk-cn20-lcdc.dtso
create mode 100644 arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-du-adv7513.dtsi
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 8bf155badd11..34a4ef0d715a 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -216,8 +216,14 @@ r9a09g057h48-kakip-pixpaper-dtbs := r9a09g057h48-kakip.dtb r9a09g057h48-kakip-pi
dtb-$(CONFIG_ARCH_R9A09G057) += r9a09g057h48-kakip-pixpaper.dtb
dtb-$(CONFIG_ARCH_R9A09G077) += r9a09g077m44-rzt2h-evk.dtb
+dtb-$(CONFIG_ARCH_R9A09G077) += r9a09g077m44-evk-cn15-lcdc.dtbo
+r9a09g077m44-rzt2h-evk-cn15-lcdc-dtbs := r9a09g077m44-rzt2h-evk.dtb r9a09g077m44-evk-cn15-lcdc.dtbo
+dtb-$(CONFIG_ARCH_R9A09G077) += r9a09g077m44-rzt2h-evk-cn15-lcdc.dtb
dtb-$(CONFIG_ARCH_R9A09G087) += r9a09g087m44-rzn2h-evk.dtb
+dtb-$(CONFIG_ARCH_R9A09G087) += r9a09g087m44-evk-cn20-lcdc.dtbo
+r9a09g087m44-rzt2h-evk-cn20-lcdc-dtbs := r9a09g087m44-rzn2h-evk.dtb r9a09g087m44-evk-cn20-lcdc.dtbo
+dtb-$(CONFIG_ARCH_R9A09G087) += r9a09g087m44-rzt2h-evk-cn20-lcdc.dtb
dtb-$(CONFIG_ARCH_RCAR_GEN3) += draak-ebisu-panel-aa104xd12.dtbo
dtb-$(CONFIG_ARCH_RCAR_GEN3) += salvator-panel-aa104xd12.dtbo
diff --git a/arch/arm64/boot/dts/renesas/r9a09g077m44-evk-cn15-lcdc.dtso b/arch/arm64/boot/dts/renesas/r9a09g077m44-evk-cn15-lcdc.dtso
new file mode 100644
index 000000000000..41c695325729
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r9a09g077m44-evk-cn15-lcdc.dtso
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * DT overlay for the RZ/T2H EVK with ADV7513 transmitter
+ * connected to DU enabled.
+ *
+ * Copyright (C) 2026 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+ * RZ/T2H LCDC configuration:
+ * ----------------------------------------------------------
+ * Function Pin SW Setting
+ * ----------------------------------------------------------
+ * LCDC_DATG0 P11_0, SW6[3]: OFF, SW6[4]: ON, SW6[5]: OFF
+ * LCDC_DATB1 P18_0, SW8[3]: OFF, SW8[4]: ON
+ * LCDC_DATB2 P18_1, SW8[1]: OFF, SW8[2]: ON
+ * HEADER_IRQ8 P22_6, SW2[1]: ON, SW2[2]: OFF
+ */
+#include "rzt2h-n2h-evk-du-adv7513.dtsi"
+
+&{/leds/led-4} {
+ /* P18_0 is used for DU function LCDC_DATB1. */
+ status = "disabled";
+};
+
+&{/leds/led-5} {
+ /* P18_1 is used for DU function LCDC_DATB2. */
+ status = "disabled";
+};
+
+/*
+ * Disable SDHI0 as SW2 settings for eMMC/SD card conflict with DU pin
+ * settings.
+ */
+&sdhi0 {
+ status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/renesas/r9a09g087m44-evk-cn20-lcdc.dtso b/arch/arm64/boot/dts/renesas/r9a09g087m44-evk-cn20-lcdc.dtso
new file mode 100644
index 000000000000..bc8a91278920
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r9a09g087m44-evk-cn20-lcdc.dtso
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * DT overlay for the RZ/N2H EVK with ADV7513 transmitter
+ * connected to DU enabled.
+ *
+ * Copyright (C) 2026 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+ * RZ/N2H LCDC configuration:
+ * ----------------------------------------------------------
+ * Function Pin SW Setting
+ * ----------------------------------------------------------
+ * LCDC_DATG0 P11_0, DSW12[3]: ON, DSW12[4]: OFF
+ * LCDC_DATG3 P14_3, DSW5[3]: OFF, DSW18[5]: OFF, DSW18[6]: ON
+ * LCDC_DATG6 P14_6, DSW15[8]: ON, DSW15[9]: OFF, DSW15[10]: OFF
+ * LCDC_DATB2 P18_1, DSW18[9]: OFF, DSW18[10]: ON
+ * I2C_SDA1 P03_3, DSW7[1]: ON, DSW7[2]: OFF
+ * I2C_SCL1 P03_4, DSW7[3]: ON, DSW7[4]: OFF
+ * ------------------------------------------------
+ */
+
+#include "rzt2h-n2h-evk-du-adv7513.dtsi"
+
+&{/leds/led-4} {
+ /* P18_1 is used for DU function LCDC_DATB2. */
+ status = "disabled";
+};
+
+&i2c0 {
+ status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-du-adv7513.dtsi b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-du-adv7513.dtsi
new file mode 100644
index 000000000000..c537b2221fdc
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-du-adv7513.dtsi
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * DT overlay common parts for the RZ/{T2H/N2H} EVKs with ADV7513
+ * transmitter connected to DU enabled.
+ *
+ * Copyright (C) 2026 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/pinctrl/renesas,r9a09g077-pinctrl.h>
+
+#define ADV7513_PARENT_I2C i2c1
+#include "rz-smarc-du-adv7513.dtsi"
+
+&pinctrl {
+ du_pins: du-pins {
+ pinmux = <RZT2H_PORT_PINMUX(9, 4, 0x28)>, /* LCDC_CLK */
+ <RZT2H_PORT_PINMUX(9, 5, 0x28)>, /* LCDC_HSYNC */
+ <RZT2H_PORT_PINMUX(9, 6, 0x28)>, /* LCDC_VSYNC */
+ <RZT2H_PORT_PINMUX(9, 7, 0x28)>, /* LCDC_DE */
+ <RZT2H_PORT_PINMUX(10, 0, 0x28)>, /* LCDC_DATR0 */
+ <RZT2H_PORT_PINMUX(10, 1, 0x28)>, /* LCDC_DATR1 */
+ <RZT2H_PORT_PINMUX(10, 2, 0x28)>, /* LCDC_DATR2 */
+ <RZT2H_PORT_PINMUX(10, 3, 0x28)>, /* LCDC_DATR3 */
+ <RZT2H_PORT_PINMUX(10, 4, 0x28)>, /* LCDC_DATR4 */
+ <RZT2H_PORT_PINMUX(10, 5, 0x28)>, /* LCDC_DATR5 */
+ <RZT2H_PORT_PINMUX(10, 6, 0x28)>, /* LCDC_DATR6 */
+ <RZT2H_PORT_PINMUX(10, 7, 0x28)>, /* LCDC_DATR7 */
+ <RZT2H_PORT_PINMUX(11, 0, 0x28)>, /* LCDC_DATG0 */
+ <RZT2H_PORT_PINMUX(14, 1, 0x28)>, /* LCDC_DATG1 */
+ <RZT2H_PORT_PINMUX(14, 2, 0x28)>, /* LCDC_DATG2 */
+ <RZT2H_PORT_PINMUX(14, 3, 0x28)>, /* LCDC_DATG3 */
+ <RZT2H_PORT_PINMUX(14, 4, 0x28)>, /* LCDC_DATG4 */
+ <RZT2H_PORT_PINMUX(14, 5, 0x28)>, /* LCDC_DATG5 */
+ <RZT2H_PORT_PINMUX(14, 6, 0x28)>, /* LCDC_DATG6 */
+ <RZT2H_PORT_PINMUX(17, 6, 0x28)>, /* LCDC_DATG7 */
+ <RZT2H_PORT_PINMUX(17, 7, 0x28)>, /* LCDC_DATB0 */
+ <RZT2H_PORT_PINMUX(18, 0, 0x28)>, /* LCDC_DATB1 */
+ <RZT2H_PORT_PINMUX(18, 1, 0x28)>, /* LCDC_DATB2 */
+ <RZT2H_PORT_PINMUX(18, 2, 0x28)>, /* LCDC_DATB3 */
+ <RZT2H_PORT_PINMUX(18, 3, 0x28)>, /* LCDC_DATB4 */
+ <RZT2H_PORT_PINMUX(18, 4, 0x28)>, /* LCDC_DATB5 */
+ <RZT2H_PORT_PINMUX(18, 5, 0x28)>, /* LCDC_DATB6 */
+ <RZT2H_PORT_PINMUX(18, 6, 0x28)>; /* LCDC_DATB7 */
+ drive-strength-microamp = <11800>;
+ slew-rate = <0>;
+ };
+};
--
2.54.0