Re: [PATCH] spi: rzv2h-rspi: fix incorrect readl() accessor for 8-bit RX path

From: Geert Uytterhoeven

Date: Tue Jun 09 2026 - 10:35:59 EST


Hi Felix,

On Tue, 9 Jun 2026 at 16:14, Felix Gu <ustc.gu@xxxxxxxxx> wrote:
On Mon, Jun 8, 2026 at 3:55 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
> > On Fri, 5 Jun 2026 at 17:26, Felix Gu <ustc.gu@xxxxxxxxx> wrote:
> > >
> > > Fixes: 8b61c8919dff ("spi: Add driver for the RZ/V2H(P) RSPI IP")
> > > Signed-off-by: Felix Gu <ustc.gu@xxxxxxxxx>
> >
> > According to Chapter 7.5 Serial Peripheral Interface (RSPI) Subsection
> > 7.5.2.1 List of Registers, the SPI Data Register supports access sizes
> > of 8, 16, and 32 bits.
> >
> > However, the "Access Size [bits]*1" column header has a foot note:
> >
> > "Note 1. The read access size is fixed at 32 bits."
> >
> > Hence that means the rzv2h_rspi_rx_u8() function as generated by the
> > RZV2H_RSPI_RX() macro is correct, but rzv2h_rspi_rx_u16() is not?
> >
> > Also, readw() in rzv2h_rx_irq_handler() is wrong, too?
> >
> Thanks for the detailed explanation.
> I didn't check the reference, just thought it's a little weird here.
>
> Although the column header has a footnote to indicate the access
> size is fixed at 32bits.
> But in 7.5.2.2 register description, it specifies that for registers like
> SPDR, SPCR, SPSCR, SPCMD, SPDCR2, SPSSR, their access
> size are fixed at 32bits, but for SPSR, there is no footnote to specify
> the access size.

True.

> And SPSR is 0x52, readl on the register cause alignment issue?

Good point. Let's wait for Fabrizio's response...

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

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