Re: [PATCH v2] cacheinfo: don't propagate DT/ACPI error when arch supplies info (arm64)

From: Greg Kroah-Hartman

Date: Fri Jun 12 2026 - 10:16:24 EST


On Fri, Jun 12, 2026 at 01:48:36PM +0100, Sudeep Holla wrote:
> On Thu, Jun 11, 2026 at 04:55:13AM -0700, Breno Leitao wrote:
> > cache_setup_properties() sets use_arch_info = true when DT/ACPI
> > provide no cache nodes and the arch can derive the topology from
> > CPU registers (e.g. arm64 reading CLIDR_EL1), but still returns the
> > original -ENOENT. cache_shared_cpu_map_setup() bails on that error
> > before the new flag can take effect, so the first CPU brought online
> > always trips a misleading warning:
> >
> > cacheinfo: Unable to detect cache hierarchy for CPU 0
> >
> > Subsequent CPUs skip cache_setup_properties() entirely because
> > use_arch_info is now true, which is why only CPU0 hits it. This is
> > reproducible on arm64 with the QEMU 'virt' machine, whose default DT
> > has no cache nodes.
> >
> > Clear ret after setting use_arch_info so the caller proceeds and
> > populates the shared cpu map via the arch-supplied leaves.
> >
>
> LGTM,
>
> Reviewed-by: Sudeep Holla <sudeep.holla@xxxxxxxxxx>
>
> Greg,
>
> Can you pick up this one as part of your next round of fixes if any or
> for v7.2 ?

I'll get to it after 7.2-rc1 is out, thanks.

greg k-h