Re: [PATCH v2] arm64: dts: qcom: sm8550: add SDHC4 controller node

[Tendai Makumire]

On Fri, Jun 12, 2026 at 10:11 AM, Vladimir Zapolskiy wrote:
> If Qualcomm supports their downstream Android kernel running on your
> board, it should be worth to contact them.

Hi Vladimir,

I had previously opened a case with Qualcomm when I started trying to get
SDHC4 working on our board and we didn't get very far with them. I did almost
all the work here without their support.

What's interesting to me is that we managed to get SDHC2 working at
UHS-I SDR104 speeds quite early on. And the traces for SDHC4 on our
board are actually shorter than what we have for SDHC2.
The only difference between the two controllers on our board
is that we don't have a level shifter on SDHC4 and the pins are
connected directly to the IW416 without any pullups or pulldowns.
The signals looked clean last time I measured them.

Tendai


On Fri, Jun 12, 2026 at 10:11 AM Vladimir Zapolskiy
<vladimir.zapolskiy@xxxxxxxxxx> wrote:
>
> On 6/12/26 11:47, William Bright wrote:
> > On Thu, Jun 11, 2026 at 10:48:34AM +0300, Vladimir Zapolskiy wrote:
> >> Looks like the SDHC driver behaves expectedly then. For me it's hard to say
> >> what may be the rootcause, I believe the lower bus frequency should be fine,
> >> so it sounds like a hardware issue, but could it be PCB/board specific one?
> >>
> >> If you find a chance to copy the SDHC driver (and its small dependencies)
> >> from Android and test it on your board, and if it also fails, then it might
> >> be well concluded that something is wrong with hardware, still it won't be
> >> quite convincing that the SoC SDHC is to blame here.
> >>
> >> Hope it helps.
> >>
> > My colleague Tendai (<tendai.makumire@xxxxxxxxxxx>) had the same issue
> > with dll-tuning failing in SDR50 when working on the downstream 5.15 msm
> > kernel [1].
>
> If Qualcomm supports their downstream Android kernel running on your
> board, it should be worth to contact them.
>
> > It does sound like a potential SI issue so I will try the following:
> >    - Sweeping the drive-strength values for the sdhc_4 lines to see if I
> >      can find a set of values that work
> >    - Scoping the lines to check SI when performing dll-tuning, our board
> >      is very dense so this is challenging.
> > I am guessing this patch is only acceptable to be upstreamed once we get
> > to the bottom of why dll-tuning is failing?
>
> Apparently if Qualcomm confirms that SM8550 SDHC4 actually has this
> discovered and unveiled defect, then this change will be accepted for
> all SM8550 platform like you propose it to be done.
>
> According to my experince SM8550 SDHC2 operates properly in UHS-I
> SDR50/SDR104 speed modes, this can be verified on the reference boards
> like HDK or QRD, and for me it sounds oddly that there is such a problem
> with SDHC4.
>
> If the proposed change as is does not enter upstream for SM8550 SoC, you
> may keep it as a necessary change in your particular board .dts file.
>
> > [1] https://github.com/imd-tec/meta-imdt-qcom/tree/kirkstone/patches/msm-kernel/files
> >
>
> --
> Best wishes,
> Vladimir