Re: [PATCH v4 18/39] drm/msm/dp: add support to send ACT packets for MST
From: Yongxing Mou
Date: Tue Jun 16 2026 - 05:37:28 EST
On 6/16/2026 8:41 AM, Dmitry Baryshkov wrote:
On Mon, Jun 15, 2026 at 04:21:14PM +0800, Yongxing Mou wrote:The one-frame delay here is inherited from the downstream code.
On 4/12/2026 2:57 AM, Dmitry Baryshkov wrote:
On Fri, Apr 10, 2026 at 05:33:53PM +0800, Yongxing Mou wrote:This hasn’t been considered yet. Do we need to change this to wait based on
From: Abhinav Kumar <quic_abhinavk@xxxxxxxxxxx>
Whenever virtual channel slot allocation changes, the DP
source must send the action control trigger sequence to notify
the sink about the same. This would be applicable during the
start and stop of the pixel stream. Add the infrastructure
to be able to send ACT packets for the DP controller when
operating in MST mode.
Signed-off-by: Abhinav Kumar <quic_abhinavk@xxxxxxxxxxx>
Signed-off-by: Yongxing Mou <yongxing.mou@xxxxxxxxxxxxxxxx>
---
drivers/gpu/drm/msm/dp/dp_ctrl.c | 43 +++++++++++++++++++++++++++++++++++--
drivers/gpu/drm/msm/dp/dp_ctrl.h | 3 ++-
drivers/gpu/drm/msm/dp/dp_display.c | 3 ++-
drivers/gpu/drm/msm/dp/dp_display.h | 1 +
drivers/gpu/drm/msm/dp/dp_reg.h | 2 ++
5 files changed, 48 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
index 1109b2df21be..6f25145ef214 100644
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
@@ -143,6 +143,7 @@ struct msm_dp_ctrl_private {
bool core_clks_on;
bool link_clks_on;
bool stream_clks_on[DP_STREAM_MAX];
+ bool mst_active;
};
static inline u32 msm_dp_read_ahb(const struct msm_dp_ctrl_private *ctrl, u32 offset)
@@ -228,6 +229,32 @@ static int msm_dp_aux_link_configure(struct drm_dp_aux *aux,
return err;
}
+int msm_dp_ctrl_mst_send_act(struct msm_dp_ctrl *msm_dp_ctrl)
+{
+ struct msm_dp_ctrl_private *ctrl;
+ bool act_complete;
+
+ ctrl = container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, msm_dp_ctrl);
+
+ if (!ctrl->mst_active)
+ return 0;
+
+ msm_dp_write_link(ctrl, 0, REG_DP_MST_ACT, 0x1);
+ /* make sure ACT signal is performed */
+ wmb();
+
+ msleep(20); /* needs 1 frame time */
20 ms is 50fps. What if we have 30 or 25 fps?
the per-frame duration of the mode?
I don't know. You wrote that we wait for 1 frame here. Why?
IPCAT describes it as: ‘When written to 1, a sequence of 4 ACT headers will be sent at the earliest possible time. The field will be cleared by HW after the 4 ACTs are sent, which then triggers the READY_FOR_VIDEO interrupt.’
So to cover the worst-case scenario, we chose one frame. Please correct me if i'm wrong.