Re: [PATCH v3 RESEND 2/5] arm64: dts: qcom: Add device tree for Nord SoC series

[Konrad Dybcio]

On 5/26/26 7:12 AM, Shawn Guo wrote:
> Add base device tree include (nord.dtsi) for the Nord SoC series
> describing the core hardware components:
> 
>  - 18 Oryon (qcom,oryon-1-5) cores in three clusters, with PSCI-based
>    power management and CPU/cluster idle states
>  - ARM GICv3 interrupt controller with ITS
>  - TLMM GPIO/pinctrl controller
>  - 8 TSENS thermal sensors with thermal zones
>  - 3 APPS SMMU-500 instances
>  - 3 QUPv3 GENI SE QUP blocks
>  - PDP SCMI channel and mailbox
>  - Watchdog, TRNG and TCSR
>  - Reserved memory, CMD-DB and firmware SCM
>  - PSCI and architected timers

[...]

> +		dump_mem: mem-dump-region {
> +			alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;

off-by-1?

[...]

> +		intc: interrupt-controller@17000000 {
> +			compatible = "arm,gic-v3";
> +			reg = <0x0 0x17000000 0x0 0x10000>,     /* GICD */
> +			      <0x0 0x17080000 0x0 0x480000>;    /* GICR * 18 */

Please drop these comments

Otherwise looks alright

Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>

Konrad