Re: [PATCH v8 11/14] x86/mm: Cap flush_tlb_info alignment at 64 bytes

[Chuyi Zhou]

On 2026-06-16 9:20 p.m., Sebastian Andrzej Siewior wrote:
> On 2026-06-16 19:11:24 [+0800], Chuyi Zhou wrote:
>> A stack allocated flush_tlb_info should keep cacheline alignment to
>> avoid the regression that motivated the per-CPU storage, but using
>> SMP_CACHE_BYTES directly can make the stack frame grow excessively on
>> configurations with large cache lines[1].
>>
>> Add FLUSH_TLB_INFO_ALIGN and cap the type alignment at 64 bytes. The
>> existing per-CPU flush_tlb_info instance remains
>> DEFINE_PER_CPU_SHARED_ALIGNED(), so its per-CPU shared-cacheline
>> alignment is unchanged.
>>
>> The capped type alignment matters once flush_tlb_info is moved back to the
>> stack by the next patch.
>>
>> link[1]: https://lore.kernel.org/all/tip-780e0106d468a2962b16b52fdf42898f2639e0a0@xxxxxxxxxxxxxx/
> 
> I suggest to incorporate a reference such as
> 
> | See commit 780e0106d468a ("x86/mm/tlb: Revert "x86/mm: Align TLB
> | invalidation info"") where the usage of SMP_CACHE_BYTES led to 320 bytes
> | stack consumption.
> 
> This [1] and link and such is just forth and back.
> 
>> Signed-off-by: Chuyi Zhou <zhouchuyi@xxxxxxxxxxxxx>
> 
> Other than that,
> Reviewed-by: Sebastian Andrzej Siewior <bigeasy@xxxxxxxxxxxxx>
> 
> Sebastian

Thanks, I will fold this into the changelog.

I will replace the indirect [1] reference with an explicit reference to
commit 780e0106d468a ("x86/mm/tlb: Revert "x86/mm: Align TLB
invalidation info""), and mention that using SMP_CACHE_BYTES led to 320
bytes of stack consumption.