RE: [PATCH v2 3/5] pinctrl: samsung: Add Exynos8855 pinctrl configuration

[Alim Akhtar]

> -----Original Message-----
> From: Peter Griffin <peter.griffin@xxxxxxxxxx>
> Sent: Monday, June 15, 2026 7:45 PM
> To: Alim Akhtar <alim.akhtar@xxxxxxxxxxx>
> Cc: krzk@xxxxxxxxxx; robh@xxxxxxxxxx; conor+dt@xxxxxxxxxx;
> linusw@xxxxxxxxxx; linux-samsung-soc@xxxxxxxxxxxxxxx; linux-
> kernel@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux-
> gpio@xxxxxxxxxxxxxxx; hajun.sung@xxxxxxxxxxx
> Subject: Re: [PATCH v2 3/5] pinctrl: samsung: Add Exynos8855 pinctrl
> configuration
> 
> Hi Alim,
> 
> Thanks for your patch. It's great to see more Exynos SoCs being supported!
> 
Thanks Peter, more patches to follow.

> On Mon, 15 Jun 2026 at 09:34, Alim Akhtar <alim.akhtar@xxxxxxxxxxx>
> wrote:
> >
> > Add pinctrl configuration for Exynos8855. The bank type macros are
> > reused from Exynos850 SoC.
> >
> > Signed-off-by: Alim Akhtar <alim.akhtar@xxxxxxxxxxx>
> > ---
> >  .../pinctrl/samsung/pinctrl-exynos-arm64.c    | 123 ++++++++++++++++++
> >  drivers/pinctrl/samsung/pinctrl-samsung.c     |   2 +
> >  drivers/pinctrl/samsung/pinctrl-samsung.h     |   1 +
> >  3 files changed, 126 insertions(+)
> >
> > diff --git a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c
> > b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c
> > index fe9f92cb037e..db120ae4d847 100644
> > --- a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c
> > +++ b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c
> > @@ -943,6 +943,129 @@ const struct samsung_pinctrl_of_match_data
> exynos850_of_data __initconst = {
> >         .num_ctrl       = ARRAY_SIZE(exynos850_pin_ctrl),
> >  };
> >
> 
> Are you sure you want to use E850 pinctrl macros and not the GS101 ones?
> The GS101 macros allow the fltcon offset to be specified, which I think is
> required for all Exynos9 (including e850 SoC). Youngmin sent a series
> previously https://lore.kernel.org/lkml/20251202093613.852109-1-
> youngmin.nam@xxxxxxxxxxx/
> fixing up some of this but it hasn't been re-spun in a while. In particular this
> patch https://lore.kernel.org/lkml/20251202093613.852109-4-
> youngmin.nam@xxxxxxxxxxx/.
> 
Thanks for pointing out, let me re-look into this, according will change.

> > +/* pin banks of exynos8855 pin-controller 0 (ALIVE) */ static const
> > +struct samsung_pin_bank_data exynos8855_pin_banks0[] __initconst = {
> > +       /* Must start with EINTG banks, ordered by EINT group number. */
[Snip]
> > +static const struct samsung_pin_ctrl exynos8855_pin_ctrl[] __initconst = {
> > +       {
> > +               /* pin-controller instance 0 ALIVE data */
> > +               .pin_banks      = exynos8855_pin_banks0,
> > +               .nr_banks       = ARRAY_SIZE(exynos8855_pin_banks0),
> > +               .eint_wkup_init = exynos_eint_wkup_init,
> > +               .eint_gpio_init = exynos_eint_gpio_init,
> > +       }, {
> 
> With fltcon_offset specified, you could then use
> gs101_pinctrl_suspend/gs101_pinctrl_resume callbacks here.
> 
Let me cross check with UM and will add accordingly.