Re: [PATCH 2/2] arm64: dts: qcom: ipq5210: Enable PCIe support
From: Konrad Dybcio
Date: Wed Jun 17 2026 - 06:56:40 EST
On 6/9/26 9:52 AM, Varadarajan Narayanan wrote:
> On Mon, Jun 08, 2026 at 11:44:56AM +0200, Konrad Dybcio wrote:
>> On 6/4/26 1:28 PM, Varadarajan Narayanan wrote:
>>> On Fri, May 22, 2026 at 02:24:45PM +0200, Konrad Dybcio wrote:
>>>> On 5/14/26 6:13 AM, Varadarajan Narayanan wrote:
>>>>> Add DT entries to enable the PCIe controllers found in ipq5210.
>>>>>
>>>>> Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@xxxxxxxxxxxxxxxx>
>>>>> ---
>>
>> [...]
>>
>>>>> +
>>>>> + resets = <&gcc GCC_PCIE0_PHY_BCR>,
>>>>> + <&gcc GCC_PCIE0PHY_PHY_BCR>;
>>>>> + reset-names = "phy", "common";
>>>>> +
>>>>> + #clock-cells = <0>;
>>>>> + clock-output-names = "gcc_pcie0_pipe_clk_src";
>>>>
>>>> Having a gcc_ prefix here smells fishy..
>>>
>>> Followed what was used in ipq9574, ipq5424 etc. Will remove gcc_ & _src.
>>
>> What is the name of the PHY's output in the clock plan? I would assume
>> it doesn't have gcc_, but it may end in _src..
>
> In the clock plan it is called as gcc_pcie0_pipe_clk_src and
> gcc_pcie1_pipe_clk_src.
Let's follow prior art (glymur.dtsi) and call it pcie<N>_pipe_clk
Konrad