Re: [PATCH 1/3] PCI: rcar-gen4: Configure AXIINTC if iMSI-RX not used

[Marek Vasut]

On 6/17/26 10:26 AM, Geert Uytterhoeven wrote:

Hello Geert,

> > +static void rcar_gen4_pcie_host_msi_init(struct dw_pcie_rp *pp)
> > +{
> > +       struct dw_pcie *dw = to_dw_pcie_from_pp(pp);
> > +       struct rcar_gen4_pcie *rcar = to_rcar_gen4_pcie(dw);
> > +       u32 val;
> > +
> > +       /* Make sure MSICAP0 MSIE is configured. */
> > +       val = dw_pcie_readl_dbi(dw, MSICAP0);
> > +       if (pci_msi_enabled())
> > +               val |= MSICAP0_MSIE;
> > +       else
> > +               val &= ~MSICAP0_MSIE;
> > +       dw_pcie_writel_dbi(dw, MSICAP0, val);
> > +
> > +       if (!pci_msi_enabled() || pp->use_imsi_rx) {
> > +               /* Clear AXIINTC mapping. */
> > +               writel(0, rcar->base + AXIINTCADDR);
> > +               writel(0, rcar->base + AXIINTCCONT);
> > +       } else {
> > +               /* Point AXIINTC to GIC ITS and enable. */
> > +               writel(AXIINTCADDR_VAL, rcar->base + AXIINTCADDR);
> > +               writel(INTC_EN | INTC_MASK, rcar->base + AXIINTCCONT);
> > +       }
> > +
> > +       /* Configure MSI interrupt signal */
> > +       val = readl(rcar->base + PCIEINTSTS0EN);
> > +       if (pci_msi_enabled())
> > +               val |= MSI_CTRL_INT;
> > +       else
> > +               val &= ~MSI_CTRL_INT;
> > +       writel(val, rcar->base + PCIEINTSTS0EN);
> > +}
> > +
> >   static int rcar_gen4_pcie_enable_device(struct pci_host_bridge *bridge,
>
> FTR, this has a contextual dependency on "[PATCH v2] PCI: rcar-gen4:
> Limit Max_Read_Request_Size and Max_Payload_Size to 256 Bytes"
> (https://lore.kernel.org/all/20260519195219.189323-1-marek.vasut+renesas@xxxxxxxxxxx).
It is not an explicit dependency, I only had these patches in my tree 
and clearly that was an interaction. I'll rebase this dependency out for V2.

Thanks!

--
Best regards,
Marek Vasut