Re: [PATCH v4 06/13] clk: qcom: dispcc-qcm2290: Switch to DT index based clk lookup
From: Imran Shaik
Date: Sun Jun 21 2026 - 09:30:29 EST
On 05-06-2026 03:58 pm, Krzysztof Kozlowski wrote:
On Thu, Jun 04, 2026 at 10:56:12AM +0530, Imran Shaik wrote:
Update the QCM2290 DISPCC driver to use the DT index based parent clock
lookup to align with the latest convention. While at it, fix the parent
data of mdss ahb/mdp clocks to use GPLL0 main output as per HW clock plan,
and update frequency table accordingly. Also, add the DSI1 PHY PLL input
clocks support.
Signed-off-by: Imran Shaik <imran.shaik@xxxxxxxxxxxxxxxx>
---
drivers/clk/qcom/dispcc-qcm2290.c | 44 ++++++++++++++++++++++++++-------------
1 file changed, 30 insertions(+), 14 deletions(-)
diff --git a/drivers/clk/qcom/dispcc-qcm2290.c b/drivers/clk/qcom/dispcc-qcm2290.c
index 1c21267ae0f7a86c1de88e888c2a990c35f0a0e0..f5dbd19d0a0334362a44f91a69229cb0f018f309 100644
--- a/drivers/clk/qcom/dispcc-qcm2290.c
+++ b/drivers/clk/qcom/dispcc-qcm2290.c
@@ -24,6 +24,18 @@
#include "gdsc.h"
#include "reset.h"
+enum {
+ DT_BI_TCXO,
+ DT_BI_TCXO_AO,
+ DT_GPLL0_OUT_DIV,
+ DT_GPLL0,
+ DT_DSI0_PHY_PLL_OUT_BYTECLK,
+ DT_DSI0_PHY_PLL_OUT_DSICLK,
+ DT_DSI1_PHY_PLL_OUT_BYTECLK,
+ DT_DSI1_PHY_PLL_OUT_DSICLK,
+ DT_SLEEP_CLK,
+};
+
enum {
P_BI_TCXO,
P_BI_TCXO_AO,
@@ -33,6 +45,8 @@ enum {
P_GPLL0_OUT_DIV,
P_GPLL0_OUT_MAIN,
P_SLEEP_CLK,
+ P_DSI1_PHY_PLL_OUT_BYTECLK,
+ P_DSI1_PHY_PLL_OUT_DSICLK,
You just added new parents which looks like clear ABI break disguised as
"switch to DT".
First, don't mix independent changes. Second, ABI changes must be
clearly documented and your first commits even tell false statements
claiming there is juet "extension".
Did you test THIS EXACTLY patch on existing devices?
Yes functionally it works, as these missing external DSI1 clocks are not used but present in the DISPCC hardware. I will split the patches as suggested.
Thanks,
Imran